数据选择器

GaAs高速数据选择器测试研究

Testing Study of GaAs High Speed Multiplexer

用AlGaAs/GaAsHBT实现的高速8：1数据选择器和1：8数据分配器

High Speed 8:1 Multiplexer and 1:8 Demultiplexer Implemented With AlGaAs / GaAs HBT

介绍了使用中规模集成电路数据选择器的原理以及使用它实现逻辑函数的方法。针对具有n位地址的数据选择器，使用降维卡诺图的思想实现了任何输入变量数大于n+1的组合逻辑函数。

The present paper introduces the principle of utilizing middle-scale integrated circuit data selector and how to realize logic functions by using it .

基于RT器件的数据选择器和D锁存器设计

Design of MUX and D Flip-latch Using RT Devices

结论用MSI数据选择器可实现任意组合逻辑函数。

Conclusion Using MSI data selector can implement any combined logic functions .

用MSI数据选择器实现逻辑函数的方法讨论

Discussion of designing logic function method using MSI data selector

用数据选择器（MUX）可进行任意组合逻辑的设计。

We can realize any design of combinatorial logic by demultiplexer ( MUX ) .

设计的电荷泵电路包括振荡器，带隙基准源，电阻反馈网络，比较器，二选一数据选择器、时钟提升电路、soft-start电路等时序控制电路以及四个功率MOS开关。

This charge pump includes oscillator , bandgap reference , resistance-feedback network , comparator , data selector , level-shifter , soft-start as well as four power MOS switches .

在高速2-bit数据选择器的设计中采用了并联峰化技术，以拓展其带宽。

To enlarge the bandwidth of high 2-bit selector , shunt peaking technology was used .

本文叙述了用MSI（主要是数据选择器和译码器）设计组合逻辑电路的方法，并分几种情况加以讨论。

The paper related on the design with MSI ( especially with data selector and decoder ) to realize combined logical circuit and had a discussion on several cases .

基于1-of-2共振隧穿数据选择器的可置位复位D触发器设计

Design of Set-Reset D Flip-Flop Using Resonant Tunneling 1-of-2 MUX

通过对基0信号2∶1数据选择器和基1信号全加器的设计及SPICE模拟，验证了所提出设计技术的有效性以及电路的低功耗特性。

A 2 ∶ 1 multiplexer with base-0 signals and full adder with base-1 signals are illustrated and simulated . From the SPICE simulation results , the effectiveness of the proposed approach and the low power characteristic of the designed circuits are validated .

用数据选择器进行逻辑设计地址变量的优化

Optimization about address variable in design of logic circuit by demultiplexer

运用数据选择器实现组合逻辑电路设计方法

Design of Combination of Logical Electric Circuit by Data Selectors

用数据选择器实现组合函数的方法

The Method of Realizing Composite Logic Function with Data Selector

采用数据选择器和矩阵方程法设计组合逻辑电路

Digital multiplexer and matrix equation in designing combinational logic circuit

数据选择器在组合逻辑电路中的应用

The Application of Data Selector in the Combinational Logic Circuit

本文介绍了产生位序列信号的三种方法：（1）计数器&数据选择器法；

Three methods of producing sequence signals are introduced .

数据选择器型通用逻辑组件的逻辑综合

Logic Synthesis Using Multiplexer as a Universal Logic Module

基本逻辑单元包括数据选择器和数据分配器。

Logical unit includes data selection and data distributor .

双边沿触发计数器由偶数、奇数加法计数器及数据选择器组成。

Double Edge Trigger Counter is composed of odd counter , even counter and data selector .

并分析了引入反馈后可将数据选择器构成具有选择功能的时序网络。

Finally , after importing feedback , multiplexer can be constructed into sequence net with selective function .

采用了简单的数据选择器，使得手动控制与自动控制的切换更为方便。

Using a simple data selector makes the switchover between manual control and automatic control more convenient .

本文分析了数据选择器可实现一般与或逻辑函数；

This paper analyzes three main points : firstly , multiplexer can accomplish general AND-OR logic function ;

数据选择器的选择

Choice of data selectors

简述了用数据选择器转换为其它功能组合逻辑电路的基本方法。

This paper briefly introduces the basic method of transforming data selector into combinational logic circuit of other functions .

利用数据选择器对采样通道切换，实现了零点漂移的补偿。

Sampling passway is made to switch over with the data selector to fulfill the compensation of zero point drifts .

数据选择器则将两个计数器中处于保持状态的奇偶数据交替输出，实现双边沿触发加法计数器的功能。

Data selector alternately to realize the functions of double edge trigger addition counter output the odd and even data in two counters .

根据逻辑反函数的一种特殊表示形式，指出数据选择器可直接实现与或非逻辑函数；

Secondly , according to special representation of logic reverse function , we can point out that multiplexer can directly accomplish AND-OR-INVERT function ;

数据选择器是一种能从多个输入数据中有选择地将一个输入数据送到输出端的组合逻辑电路。

Multiplexer is a kind of combinational logic circuit , which can be selected an in-put datum among several data and sent it to out-put port .