处理器指令

  • 网络Processor Instructions;processing instructions
处理器指令处理器指令
  1. 适用于SoC系统级设计的处理器指令集仿真技术的初步研究

    The Primary Research on the Technology of Processor Instruction Set Simulating for SoC System-Level Design

  2. 过去,IE中的JavaScript是解释执行的,并不会编译为本地的处理器指令。

    In the past , JavaScript in IE was interpreted and not compiled into native processor instructions .

  3. LiquidXMLDiff具有很多特定于XML的选项,比如删除空白、注释和处理器指令。

    Liquid XMLDiff has many XML-specific options such as removing whitespace , comments , and processor directives .

  4. 使用JIT编译器时,Java程序按每次编译一个方法的形式进行编译,因为它们在本地处理器指令中执行以获得更高的性能。

    With a JIT compiler , Java programs are compiled one method at a time as they execute into the native processor 's instructions to achieve higher performance .

  5. 研究表明,将FFT算法加入到Nios嵌入式处理器指令集中,可以帮助系统完成复杂的数据处理任务,增强Nios系统的实时处理能力。

    Research result shows , system designer can use custom instructions to implement complex data processing tasks by adding FFT instructions to Nios instructions set , enhanced the real-time processing ability of system .

  6. 许多在一个单一的,虽然缓慢进行,在CISC的处理器指令,可能需要两个,三个或更多的在一个简单的RISC指令的复杂功能。

    Many of the complex functions performed in a single , albeit slow , instruction in a CISC processor may require two , three , or more simpler instructions in a RISC .

  7. 最后,将SPI公司提供的计算核心指令集与Pentium系列处理器指令集进行对比,并为下一章的算法流化提供量化的数据支持。

    Finally , core instruction set provided the calculation of SPI and the Pentium family of processors instruction set is compared , and the algorithm streaming for the next chapter provides quantitative data support . 4 .

  8. ECC密码协议和点乘调度算法由主处理器指令和扩展的ECC专用指令编程实现;ECC点加、倍点等运算则由硬件加速协处理器实现。

    The cryptographic protocols and the point multiplication of ECC are computed by software programs , which are composed of main processer instructions and extended application specific ECC processing instructions . The ECC point addition and doubling are operated in ECC hardware coprocessor .

  9. 预处理器指令必须显示为一行上的第一个标记

    Preprocessor directive must appear as the first token on a line

  10. 该地址产生器主要完成地址计算和协处理器指令的场抽取功能。

    The address generator mainly implements the address calculation and instruction-field extraction of the coprocessor .

  11. 面向专用处理器指令集设计的应用特征分析方法研究与实现

    Research and Realization on Analysis Method of Application Features Faced Instruction Set Design of Specific Processor

  12. 在此过程中,执行所有的预处理器指令,执行宏展开,并移除注释。

    In the process , all preprocessor directives are carried out , macro expansions are performed , and comments are removed .

  13. 设计了专用的协处理器指令集,包括去块效应滤波、DCT/IDCT变换、运动估计及运动补偿的部分算法。

    Specialized instruction set has been developed , including the deblocking filter , the DCT / IDCT , motion estimate and motion compensate algorithm .

  14. 指令添加到输出中,位于每个包含文件的开头和结尾以及被条件编译预处理器指令移除的行的周围。

    Directives to the output , at the beginning and end of each included file and around lines removed by preprocessor directives for conditional compilation .

  15. 类似的一个例子是完全虚拟化解决方案通过运行时代码扫描来查找和重定向特权指令(用来解决特定处理器指令集的一些问题)。

    A similar example is runtime code scanning used by full virtualization solutions to find and redirect privileged instructions ( to work around issues in certain processor instruction sets ) .

  16. 本文汲取了并行计算、处理器指令、多核平台性能优化等多方面知识,结合对大量文献的总结,归纳出了多核平台软件性能优化常用的八种方法。

    It includes parallel computing , processor instructions , multi-core performance optimization and so on . Furthermore , by reading a large number of references , we summarize eight methods of performance optimization on multi-core platform .

  17. 一种实时Java处理器的指令存取部件设计与实现

    Designing and realizing an instruction fetch unit for real-time Java processor

  18. Java处理器中指令合并技术的研究与实现

    The study and Realization of instruction folding in Java processor

  19. 嵌入式可重构DSP处理器的指令译码器设计

    Design of Instruction Decoder of Reconfigurable Embedded DSP Processor

  20. 基于Nios处理器用户指令的SHA1算法的实现

    Implementation of SHA_1 Algorithm Based on Custom Instruction of Nios Processor

  21. JIT编译器会根据处理器生成指令并充分利用所处的平台。

    Instruction generation can also be tailored to the underlying processor to take full advantage of the underlying platform .

  22. 该方法要用到处理器的指令集体系结构,RTL级描述和门级网表。

    Grade . The instruction set architecture , RT level description along with gate level netlist are used in the approach .

  23. 利用活芯BIOS结构给处理器提供指令流,同时通过编程验证环境中的组成单元来构造验证场景。

    The flexible BIOS structure provides instruction stream to micro-processor , meanwhile program the components in the soft environment to create the test scenarios .

  24. 针对现代嵌入式处理器中指令高速缓存功耗显著的问题,提出一种基于Cache行间访问历史链接关系的指令高速缓存低功耗方法。

    To reduce the power dissipation of instruction cache , which is more significant in modern embedded processor , a low power instruction cache accessing method , based on inter-line linking history , was proposed .

  25. 整个OMGIDL内容和通过预处理器伪指令传入的所有文件共同组成了命名作用域。

    The contents of an entire OMG IDL file , along with any files brought in through preprocessor directives , form a naming scope .

  26. 本文从一个嵌入式RISC处理器的指令FIFO设计出发,提出了SDRAM的功耗模型,基于该功耗模型,提出了最优化的指令FIFO设计。

    Based on the design of instruction pre-fetch FIFO for an embedded RISC processor , a SDRAM power model has been presented to optimizing the FIFO design .

  27. 文章介绍了Nios处理器用户指令的接口原理,并详细描述了在Nios处理器中实现SHA1算法的设计过程。

    This paper introduces the principle of interface custom instruction of Nios Processor , and describe the designing process of SHA_1 algorithm in in the Nios Processor .

  28. 根据ARM7处理器的指令长度和数据类型等方面的特点,对Kaffe虚拟机的数据结构进行了重新设置。

    According to the characteristics such as length of the instructions and data types of ARM7 , data structure of Kaffe was reset .

  29. 作为一家为计算机处理器生产指令集构架的英国公司,ARM绝对算不上家喻户晓,至少没有苹果(Apple)的iPhone和谷歌(Google)的Android那么出名。但是,ARM与iPhone和Android一样无处不在。

    ARM , the British company that makes instruction set architectures for computer processors , is certainly not a household name - not the way Apple 's iPhone and Google 's Android are , anyway . But that doesn 't mean it 's any less ubiquitous .

  30. 实验结果证明了本论文给出指令集仿真器ESL设计方法的正确性,并且实验结果显示本论文设计的TTA架构处理器的指令集仿真器,对硬件设计者和系统开发者都有较强的实用性。

    The experimental results proved the validity of the given instruction set simulator , and experimental results show that the TTA processor instruction set simulator has a strong practicality not only for hardware designers but also for system developers .