逻辑电平
- 网络Logic level;TTL;Understanding and Interpreting Standard-Logic Data Sheet
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在一个数据锁存如果LE是低,时钟是在高或低的逻辑电平举行。
The A data is latched if LE is low and clock is held at a high or low logic level .
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多功能芯片ADT14既是一种输出逻辑电平控制信号的多点温度监控器,又是一种输出模拟电压信号的温度传感器,可广泛应用于各种嵌入控制系统中。
The multi-functional chip ADT14 is a kind of multi-point temperature monitor of outputting logic level control signal , It is also a kind of temperature sensor of outputting simulated voltage signal .
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LVDS、ECL、CML逻辑电平电路的特点及应用
Features and Applications of Logical Level Circuit LVDS , ECL and CML
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当调制信号的任一逻辑电平在一个较宽范围内波动时,调制输出的FSK信号能够保持一个固定大小的频偏。
When any logic value in modu-lation signal varies to a large extent , the fixed frequency shift in FSK signal main-tained .
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本文介绍低电压供电的MSP430系列单片机与5V供电的器件接口时所产生的逻辑电平的不匹配问题,分析了产生原因,并提供了相应的解决方案。
This paper introduced the problem of MSP430 family which contracted with 5V system IC . And also analysed it , so provided several solutions .
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针对2407A器件的特点重点介绍了混合电压和逻辑电平设计的解决方案。
In allusion to the characteristics of 2407A , the paper puts emphases on the solution of mixed voltage and electrical logic design .
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输出逻辑电平改变状态时的输入电压。
The input voltage at which the output logic level changes state .
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数字集成电路逻辑电平接口技术研究
A Research on Interface Technology for Digital Integrated Circuit 's Logic Level
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阈值电压的逻辑电平降解能力的检查。
Voltage threshold capability checks for logic level degradation .
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主放大器把前置放大器的输出信号放大到数字逻辑电平,并且保持数字电平的恒定,以实现限幅的功能。
Main amplifier is used for amplifying the output signal of preamplifier into digital voltage level .
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静态保护逻辑电平指示器
Logical Level Indicator for Static Protection
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绝对参量公约中最常见的例外就是温度和逻辑电平。
The most common exceptions to the use of the absolute magnitude convention are temperature and LOGIC levels .
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在突发式的接收模块中,逻辑电平的恢复和时钟数据的恢复是其关键的问题。
The most difficult problem in burst mode receiver would be signal logic level recovery and data and clock recovery .
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介绍无刷直流电机的无传感器转子位置检测的一种新方法&反电势逻辑电平积分比较法。
This paper describes a novel method of indirect sensing for rotor flux position of the brushless DC motor ( BLDCM ) .
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一个中微子(一种不带电荷形态诡异的亚原子粒子)脉冲对应着逻辑电平1,没有脉冲时就对应着逻辑电平0。
A pulse of neutrinos ( small , elusive subatomic particles with no electric charge ) corresponds to the digit 1 while no pulse corresponds to 0 .
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给出了调节设定逻辑电平阈值的计算公式和部分电路参数,使逻辑电平界限清楚,判断确切。
It supplies the account formulas and partial circuits parameters of the threshold value for adjusting and setting-up logic level . It makes logical level boundary clear and well-judged .
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一个中微子(一种不带电荷形态诡异的亚原子粒子)脉冲对应着逻辑电平“1”,没有脉冲时就对应着逻辑电平“0”。
A pulse of neutrinos ( small , elusive subatomic particles with no electric charge ) corresponds to the digit " 1 " while no pulse corresponds to " 0 . "
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接口电路是测控系统的重要组成部分,用来解决信息的传输和处理,如信息的传输速度、信息的传输方式、信息的编码格式和逻辑电平。
As a part of measurement and control systems , the interfaces play an important part of the information transmission and processing , such as the transmission-mode , the transmission-speed and the code-format of information and the logic levels .
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逻辑脉冲电平讯响和光指示器的研究及使用
The research and application of an audible logic pulse probe
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一种多功能快逻辑信号电平转换电路的设计与实现
The design and implementation of a Multi-functional levels adaptation circuit for fast logic signals
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接收器输入具有失效保护特性,当输入开路时,可确保逻辑高电平输出。
The receiver input has a fail-safe feature that guarantees a logic-high output if the input is open circuit .
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本文论述在进行多通道并行同步数据采集或外部事件计数时,可应用软件扫描和逻辑判读高电平并累计其个数的方法。
In this paper , it is addressed that a software designed for scaning , logically judging , reading and counting high levels can be used for multiplex , parallel and synchronous data acquisition or counting of external events .
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完整内桥接线单主变变电所备自投逻辑剖析逻辑接口电平变换器
Analysis on Bus-bar Automatic Transfer Switch Logic of Inner-bridge Connection with One Transformer interface level converter
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电路的电源电压为3~18V,适用于各种类型的数字逻辑电路的逻辑电平判断。
The circuit supply voltage is 3 ~ 18 V , suitable in logic level of kinds of digital logical circuits .
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根据设计的多值仪器不仅能产生多值函数信号,还可以测试多值逻辑电路的逻辑电平,分析多值逻辑电路的逻辑功能。
The multiple-valued instrument made according to the proposed design can not only produce multiple-valued function signal , but also can test the logic level of multiple-valued logic circuits and analysis the logic function of c circuits .
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这种功能优良的三态逻辑指示电路由555IC集成定时器、逻辑电平阈值调节设定电路、逻辑指示电路构成。
This kind of function fine tri-state logic indicating circuit is composed of 555 integrate timer , logical level threshold value adjustment circuit and the logic indicating circuit .
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逻辑分析仪是数字时序的测试仪器,可以用来监测硬件设备工作时的电路逻辑电平,最后通过图形的方式直观地表达出来,便于用户检测和分析电路设计中的错误。
The logical analyzer is the sequence number , which can be used to monitor the work of instrument hardware , and finally expressed with graphics intuitively , facilitate user testing and analysis of errors in the circuit design .