噪声容限

  • 网络noise margin
噪声容限噪声容限
  1. 噪声容限的优化增强了SRAM的抗干扰能力。

    The optimization of cell static noise margin enhances the anti - jamming ability of SRAM .

  2. 分析了GaAs源耦合FET逻辑电路的结构,阐述了该电路的工作原理、开关特性和噪声容限,分析了该电路的特点。

    The structure , the principles , the behavior of dc switch , the noise margin of GaAs source couple FET logic ( SCFL ) and the characteristic of this circuit are analyzed in this paper .

  3. 安全逻辑器件与CMOSB/T逻辑电路及其噪声容限

    Safe Logic Elements CMOS B / T Logical Circuits and Their Noise Margins

  4. 之后,通过仿真存储单元的噪声容限设计了SRAM六管存储单元的尺寸。

    Then the memory cell 's size is designed by SNM simulation .

  5. 电源网格上的IRDrop会降低器件的开关速度和噪声容限,甚至导致逻辑错误。

    IR drop on power grid may decrease switching speed and noise immunity of the circuits . It may even cause the circuit to fail .

  6. 图形越小越复杂,噪声容限就越低。

    The smaller and more complex the figure , the lower the noise tolerance .

  7. 视差小,噪声容限高。

    The noise tolerance for crossed disparity is higher than that for uncrossed disparity .

  8. 随机点立体图对的最大噪声容限看来不会超过30%。

    It seems that the maximum noise tolerance of RDS does not exceed 30 % .

  9. 说明了标准单元库的噪声容限、瞬态特性和单元扇出能力的描述方法。

    The noise margin , the transient behavior and the fan out ability of the cells are explained .

  10. 未滤波及各通道图对的最大噪声容限均不超过25%。

    The maximum noise tolerance of unfiltered stereogram and all stereograms of spatial frequency channels do not exceed 25 % .

  11. “棋盘格”质地的噪声容限略高于“窗纱布”质地的噪声容限。

    The noise tolerance for " checkboard " texture is a bit higher than that for " gauze-like " pattern .

  12. 过大的电压降会导致电源电压波动、噪声容限减小、逻辑门延迟增加、开关速度降低、产生逻辑错误甚至逻辑功能失效。

    This IR-drop will cause supply voltage variation , reduced noise margins , higher logic gate delays and slow overall circuits .

  13. 戴维南并行端接可以有效地抑制过冲和欠冲,使得信号的摆幅缩小,增强了系统的噪声容限。

    The parallel termination can effectively suppress overshoot and undershoot that makes the signal swing less and the system noise tolerance larger .

  14. 其中包括对印制板的布线、电容性耦合、数字电路的噪声容限和传输线的探讨。

    It includes wiring of printed circuit board , electric capacity coupling , tolerance of digital circuit noise , and transmission line .

  15. 模拟结果表明,设计的两种新多米诺电路在同样的噪声容限下有效地降低了动态功耗,减小了总的漏电流,同时提高了工作速度。

    The simulation results show that the proposed circuits effectively lower the active power , reduce the total leakage current , and enhance speed under similar noise immunity conditions .

  16. 交叉视差和不交叉视差的噪声容限是不对称的,交叉的比不交叉的高。(2)立体视觉抗干扰能力与图形的大小和结构有关。

    The noise tolerance for crossed disparity is higher than that for uncrossed disparity . ( 2 ) Stereoscopic noise tolerance is related to the magnitude and structure of figure .

  17. 测试结果表明:本装置能够适应传感器线性段的整体漂移和中心点漂移,输出信号具有数字电路的噪声容限。

    The test shows that the device can adapt the driftage of whole linear operation section and the driftage of center of linear operation section , the output signal has a noisy tolerance as digital circuits .

  18. 参数连续可调的脉冲信号和大容量多样化的数字信号,满足了高速数字设备中噪声容限的测试以及大型集成电路和射频系统的设计初期对激励信号的需求。

    Pulse signal of continually adjustable parameters and high-capacity data signal have satisfied the demand for noise margin test of digital instruments , as well as the excitation signals required during the initial designs of VLSI and RF system .