指令集架构
- 网络Instruction Set Architecture;Isa
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本文专注于仿真的两个方面:CPU(指令集架构[ISA]仿真)和设备。
This article focuses on two aspects of emulation : the CPU ( instruction set architecture [ ISA ] emulation ) and devices .
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仿真还常常解释来宾VM的指令(与虚拟化相比,此处来宾的指令集架构必须与主机相同)。
Emulation also commonly interprets the instructions of the guest VM ( compared to virtualization , where the instruction set architecture of the guests must be the same as the host ) .
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高性能可重构指令集架构模拟技术
High performance retargetable instruction-set architecture simulation technique
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本文基于专用指令集架构提出了一种低成本、高性能的安全处理器解决方案,能够适用于各种嵌入式信息安全系统。
A low-cost , high-performance application specific instruction set security processor is proposed in this paper .
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通过设计匹配密码处理特征的指令集和硬件架构,实现面向密码处理的专用指令集处理器,可取得灵活性和性能的折中,成为密码处理领域研究的热点课题。
Application Specific Instruction-Set Processor ( ASIP ) for cipher processing can achieve a compromise between flexibility and performance , by instruction-set and architecture design based on characteristics of cipher processing . Therefore , ASIP becomes the research hotspot of cipher application .
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一种专用指令集安全处理器的架构设计与实现
Architecture Design and VLSI Implementation of an Application Specific Instruction Set Security Processor