集电区

  • 网络Collector;collector region
集电区集电区
  1. 结果表明,将Ge引入集电区可有效地推迟HBE发生;

    Results show that Ge introduced into the collector can delay HBE .

  2. 基于非选择性外延,基极/发射极自对准和集电区选择性注入,提出了一种可用于1.5μmSiGeBiCMOS集成的HBT器件结构及其制作流程。

    Based on the non-selective epitaxy , self-aligned base / emitter and selective implanted collector , a kind of SiGe HBT structure for 1.5 μ m BiCMOS integration and corresponding process flow is presented .

  3. 集电区阶梯缓变InGaAsP层的具有超高f_(max)、f_T的双异质结双极晶体管

    Ltra-High f_ ( max ) and f_TI_nP / InGaAs Double-Heterojunction Bipolar Transistors with Step-Graded InGaAsP Collector

  4. 扩展电阻的测试结果显示出注入的P离子基本上集中在集电区的位置,对发射区和基区未造成显著影响。

    Measurement results of impurity concentration show that implanted P element distributes mainly in collector region and has no obvious influence to the impurity distribution in emitter and base .

  5. 结果发现,随着Ge引入到集电区,异质结势垒效应只有在较高的集电极电流下才会发生,而且产生异质结势垒的临界电流密度随Ce进入集电区深度的增大而增大。

    It shows that the onset of HBE can be delayed to higher current density when Ge is extended into collector .

  6. 建立了将Ge引入到集电区后异质结势垒效应(HBE)的一维解析物理模型。

    A new one-dimensional analytic model of heterojunction barrier effect ( HBE ) in SiGe base HBT with an extended Ge into collector is proposed .

  7. 带有复合掺杂层集电区的InP/InGaAs/InPDHBT直流特性分析

    Analysis of an InP / InGaAs / InP DHBT with Composite Doping Collector

  8. 本文提出了高压低饱和压降GTR的最佳设计方法。分析表明,高压低饱和压降晶体管采用集电区穿通性设计比非穿通性设计有利。

    The best design method of high voltage and low saturation voltage GTR presented in this paper shows that the collector region through design is better than non-through design .

  9. 无论NPN型还是PNP型管,三极管内部均有三个区、即发射区、基区、集电区,三个区形成两个PN结。

    Regardless of type NPN or PNP-type tubes , the internal transistor has three areas , namely , the launch area , base , collector area , the three areas form two PN junction .

  10. 首次提出了一种新型复合集电区结构,较好地解决了SHBT(单异质结双极晶体管)反向击穿电压低,DHBT电子堆积且与PIN探测器(PIN-PD)无法外延共享的问题。

    A novel composite collector layer structure is presented for the first time , which better solves the poor breakdown voltage of SHBT ( single heterojunction bipolar transistor ) and the electron blocking efforts of traditional DHBT .

  11. 同时,该结构具有外延层结构简单,集电区漂移速率高等优点。

    In addition , the epitaxy layer of this structure is easy to grow and the electron velocity of collector is high . 3 .

  12. 着重分析了多晶硅发射极对提高电流增益的作用和低温下集电区中性杂质碰撞电离引起的电流倍增效应。

    The contribution of polysilicon emitter to the improved current gain and the current multiplication effect caused by collision on ionization of the neutral impurities in the collector region at low temperature are both discussed in this paper .

  13. 针对频率与功率、功耗的矛盾,提出了绝缘深阱结终端结构和梳状集电结(基区)结构。

    In view of the contradiction among frequency , output power and dissipation power , propose deep-trench junction termination structure filling with isolated materials and collector-combed ( base-combed ) structure .