时钟电路

PCB板上时钟电路的辐射超标实例

An Example of Radiated Emission Improvement of Clock Circuit on PCB

LCD驱动控制时钟电路的设计

A Clock Generation Circuit in LCD Driver and Controller

满足RFID阅读器系统对时钟电路的设计要求。

These meet the RFID reader system design requirements .

基于PCB仿真的高速时钟电路设计研究

Study of High-speed Clock Signal Transmission Based on PCB Simulation

论文首先进行了最小系统的设计，包括DSP、电源电路、复位电路、时钟电路等几部分；

At first , the minimal system was designed , including DSP , power circuit , reset circuit and clock circuit .

用于UHF射频识别的时钟电路和调制电路

Clock Regenerator and Backscatter Modulator for UHF RFID Application

32位RISC微处理器内部时钟电路的设计

Design of Internal Clock Circuit for A 32-b RISC Microprocessor

本文讨论如何设计工作在GHz频率下的VLSI芯片时钟电路。

We discuss the design of clock distribution circuits for VLSI chips operating at GHz frequency .

适用于HDTV的低抖动时钟电路

A Low - Jitter Clock Generator for HDTV

另外，完成了电源模块设计、时钟电路的设计、门限电平产生电路设计、串口转USB接口电路设计。

In addition , the power modules , the clock circuit , a threshold level circuit and the USB interface circuit were implemented .

用RLC互连线模型实现时钟电路的动态优化

Exploiting clock circuit dynamical optimization using RLC interconnect model

TMR计算系统中的容错锁相同步时钟电路

A Fault-tolerant Synchronizing Clock Circuit for TMR Computing System

温度自适应性DRAM刷新时钟电路

Temperature Adaptive Refresh Circuit of DRAM

数据采集与控制模块设计：该部分是逻辑分析模块的核心部分，主要在FPGA中实现。包括时钟电路的设计、定时/状态分析采样电路的实现、混合触发电路设计以及存储控制电路的设计。

Data acquisition and control module realized in FPGA , which includes the design of the time generator circuits , the data sampling , mix-trigger and distinguish circuits and data storage . 3 .

在系统硬件设计中，给出了各功能模块：包括电源、时钟电路、存储器的扩展、射频模块、LED扫描驱动模块等的具体设计。

In the system hardware design , given the various functional modules : including power supply , clock circuitry , memory expansion , RF module , LED module , such as scan driver of the specific design .

主要包括触发电路的设计、高速时钟电路设计、A/D数字化与数据采集电路设计、时间内插电路设计和PCI总线接口设计。

It includes the design of trigger circuit , high speed clock circuit , A / D digital and data acquisition circuit , time inter-plug circuit and PCI interface circuit .

一种使Charge-pump的输出电压稳定的时钟电路

A kind of clock circuit that can stabilize the output voltage of the charge-pump

包括了时钟电路、AD采样电路、微惯性器件的校零和补偿电路、数字积分电路和串口输出电路：2、计算机测试系统的设计。

In this part , we focus on the signal-dealing circuit design such as clock circuit , AD circuit , zero-calibration and compensation circuit and numeric integral circuit . 2 . Test system of MIMU .

讨论了运动控制系统的功能结构，针对主要的电路结构进行了详细设计和分析，其中包括复位和时钟电路、串行通信接口、ADC电路、电机驱动、信号隔离与反馈检测等模块。

The main content includes : the choice of CPU , motor drive control , serial communication interface circuits , ADC , signal segregate circuits and so on .

硬件设计方面，以ARM为核心实现了电源电路、时钟电路、调试电路、数据通信电路和越限报警电路等模块的设计。

Among the hardware design , power circuit , clock circuit , debug circuit , data communication circuit , limit alarm circuit modules and so on , have been implemented with the use of ARM core .

本论文的嵌入式硬件环境，包括CPU的外围时钟电路，复位电路，存储器单元，LCD模块，触摸屏，键盘，FLASH，SDRAM，网络接口等部分。

The embedded system in this thesis include CPU , memory part , LCD part , touching screen , keyboard , FLASH , SDRAM and internet interface and so on .

以数字锁相技术为基础。研制出用于TMR计算系统的容错同步时钟电路。

Based on the digital phase-locked loop technique , a fault-tolerant synchronizing clock circuit for TMR computing system has been developed .

在时钟电路中采用分相采样技术，实现了定时分析最高200M的等效采样速率。

Application of the technology of sampling in different phase in clock circuit realizes maximum 200M equivalent sampling rate of timing analyzer .

本论文详细讨论了各个模块的具体设计方案，包括电源电路、复位电路、时钟电路、存储模块、显示模块等，并在cadence环境下完成了原理图设计和PCB布线。

This paper discussed the specific design of each module of the power supply circuit , reset circuit , clock circuit , memory module , display module .

对整个系统的硬件电路进行了设计，包括相应的电源模块、时钟电路模块、电平转换模块和JTAG接口。

The hardware circuit is designed for the system , including the power module , clock circuit module and JTAG interface .

发射机的硬件部分包括DSP控制电路、GPS与DSP接口电路、DDS电路、时钟电路、滤波电路、功率放大电路。

The hardware of the transmitter includes the control circuit of DSP , the interface circuit of GPS and DSP , the DDS and clock circuit , the filter circuit , and the power amplifier circuit .

CPU核心电路的设计主要有处理器、Flash、SDRAM、网络接口电路、标准JTAG接口、电源电路、复位电路、时钟电路等的设计。

CPU core circuit include processor circuit , FLASH , SDRAM , network interface circuit , the standard JTAG interface , power supply circuit , reset circuit , clock circuit .

论文中详述了下位机控制器和驱动器的设计，其中包括处理器DSP芯片的内核组成、外设和时钟电路、电机驱动、电机测速、A/D和D／A转换电路、反馈检测与供电电路等模块。

The thesis details the under-controller and actuator design , including the core processor chip components of DSP , peripheral interface and clock circuits , the motor-driven , ADC and DAC circuit , feedback signal detections and power supply circuit .

控制器硬件电路由稳压电路、时钟电路、JTAG接口电路以及键盘模块构成。

The hardware circuit of the controller is composed of the voltage regulator circuit , the clock circuit , the circuit of JTAG and the interface circuit of keyboard .

文中描述该设计所涉及的主要实现方法，包括Aurora协议接口设计、特殊的片上时钟电路设计、片上存储器设计以及芯片引脚和布局设计等。

This paper describes some considerations in the design including the interface design for FPGA based Aurora protocol , special on-chip clocking circuit design , on-chip memory , pin-out and layout design .