时钟速度

波特率会对CPU时钟速度产生限制。

There are constraints on the CPU clock speed related to the baud rate .

虽然它的四核心“上海”Opteron处理器达到了2.3GHz的最高频率，六核心部分不得不放弃一些时钟速度，降低到1.8GHz，以管理六核热负荷。

While its quad-core " Shanghai " Opterons reached a maximum frequency of2.3GHz , the six-core part had to give up some clock speed , down to1.8GHz , to manage the thermal load for six cores .

例如数字系统设计，不容置疑.随着时钟速度和数据速率的增加，EMC设计将变得愈来愈重要。

This will no doubt increase in importance as the trend toward increased clock speeds and data rates of digital systems continues .

其他微型控制器也许服务表现重要角色，他们也许需要行动更多象一个数字信号处理器（DSP），与更高的时钟速度和电力消费。

Other microcontrollers may serve performance-critical roles , where they may need to act more like a digital signal processor ( DSP ), with higher clock speeds and power consumption .

今天，随着CPU时钟速度比第一次发布Java平台时快了近一百倍，一毫秒已经成了相对长的一段时间。

Today , with CPU clock speeds roughly a hundred times faster than when the Java platform was first released , a millisecond has become a relatively long time span .

BIOS要做的第一件事情是执行各种加电测试：确定（还可能要测试）可用内存、确定时钟速度等。

One of the first things the BIOS does is perform various power-up tests : identifying ( and possibly testing ) available memory , determining clock speeds , and so on .

车用悬挂式时钟速度显示电路设计

Circuits Design of Hanging Clock and Speed Display for Automobiles

我宁愿买920，和水冷却，以达到最大时钟速度。

I would rather buy920 , and water cool it to achieve maximum clock speed .

除时钟速度外，处理器使用的技术也会影响性能。

Besides the clock speed , the technology used in a processor can affect performance .

当处理器以较低的时钟速度运行时，它们消耗的电能和产生的热量也相对较少。

When processors operate at a lower clock speed , they consume proportionately less power and generate less heat .

尽管不同处理器架构间的时钟速度没有可比性，但是它使得安腾处于劣势。

While clock speeds cannot be directly compared between different processor architectures , it does make the Itanium look bad .

潜伏期的内存是衡量纳秒，因为它通常是独立于处理器的时钟速度。

The latency of memory is measured in nanoseconds as it is typically independent o ­ n processor clock speed .

时钟速度的这种缩放可以控制系统在未全力运行时消耗较少电能。

This dynamic scaling of the clock speed gives some control in throttling the system to consume less power when not operating at full capacity .

砷化镓启动的速度是硅的10倍，突然，我得到了10倍快的时钟速度，但是设计没有发生任何改变。

Gallium arsenide switches ten times faster than silicon All of a sudden , I 've got a clock speed ten times faster with no change in design .

多年来，处理器制造厂商在不断提高时钟速度和指令级并行性，因此单线程代码不需要修改就可在新的处理器上更快运行。

For years , processor makers consistently delivered increases in clock rates and instruction-level parallelism , so that single-threaded code executed faster on newer processors with no modification .

并通过版图设计的考虑，探讨了提高所设计微处理器的时钟速度的方法。

Moreover , layout design is also included in this paper and some methods which can be used to improve the clock speed of the micro-processor are discussed , too .

顾名思义，此调控器的目标的通过将处理器时钟速度设置为最大级别而实现最大的系统性能。

As the name implies , this governor 's goal is to get the maximum performance out of a system by setting the processor clock speed to the maximum level and leaving it there .

特别的是，他们使用从无脊椎动物推衍出的分子时钟，速度比脊椎动物的分子时钟要快得多。

In particular , they used a molecular clock rate derived from invertebrates , which is slower than the one based on vertebrates .

利用光窄带滤波器加快帧时钟消失速度的理论和实验研究两惯性系相对速度一定时，运动的复摆钟都比静止的钟慢了一个相同的因子。

Investigation on Packet Clock Recovery with Fastened Unlocking Time Using an Optical Band-Pass Filter And if the relative velocity of two inertial frames is constant , the compound pendulum in motion runs slower at a same factor than the resting one .

需求不断地推动着电子学系统的性能发展，随着半导体工艺的进步，片上时钟的速度和板级时钟的速度都在逐年提高，信号的带宽已经进入了传统的微波电路的频带范围。

The industry and market needs to promote the performance of electronic systems . As the semiconductor technology advances , the on-chip clock speed and board-level clock speed increases yearly . High-speed circuit bandwidth has accessed to the traditional circuit microwave frequency bands .

英特尔的Corei5和Corei7运行，远低于其热和电的限制，使涡轮推动的“超频”的CPU时钟频率和速度。

Intel Core i5 and Core i7 operates well below its thermal and electrical limits , allowing the Turbo Boost to " overclock " the CPU clock frequency and speed .

你的微型计算机执行程序的速度将与你的时钟信号的速度成线性关系。

The speed with which your microcomputer executes programs will vary linearly with the speed of your clock signal .

一个指令周期需要44个时钟周期，速度较慢，所以只能进行基本的加、减、乘、除运算；本文提出并讨论了模加与模乘运算的逆运算&模减与模除运算。

Moreover , an instructor period contains 44-clocks period . Modulo subtraction and modulo division , the inverse operations of modulo addition and modulo multiplication , are proposed and discussed .

设计中为了加快恢复时钟锁定于发送端时钟的速度，设置了时钟快锁和慢锁。

In order to speed up the recovery clock locking to the transmitter ' clock , design clock fast lock and slow lock to dynamically control the recovery of local clock .

一些实验使用了特制的时钟，这些钟能够以正常时钟的一半速度或者两倍速度运转。

Some used a special clock that could be set to run at half-speed or double-speed .

不像CISC处理器，一般的RISC引擎执行在一个时钟周期，每个指令，在快上具有相同的时钟速度的CISC处理器执行一般的结果。

Unlike CISC processors , RISC engines generally execute each instruction in a single clock cycle , which typically results in faster execution than on a CISC processor with the same clock speed .