时钟发生器

基于DP标准发射端扩频时钟发生器电路设计

Circuit design of spread-spectrum clock generator based on DP standard

2-GHzCMOS锁相环时钟发生器研究与设计

A 2-GHz CMOS phase-locked loop clock generator research and design

采用FPGA的高速CCD相机的时钟发生器

Timing generator of a high speed CCD camera using FPGA

ADC的孔径抖动必需尽可能的小，而且要使用低相位噪声的石英晶体振荡器作为采样时钟发生器。

The ADC aperture jitter must be minimal , and the sampling clock generated from a low phase-noise quartz crystal oscillator .

由于高性能、低成本已成为SoC设计的主要挑战，作为片上时钟发生器锁相环的设计变得非常关键。

Because the demands of high performance and low cost are now the main challenges for SoC design , the design of phase-locked loops ( PLLs ) used as clock generators on chip becomes very critical .

直接RAMBUS时钟发生器

DRCG Direct Rambus clock generator

为使相机具有紧凑的结构，本文使用了可编程逻辑电路实现相机控制电路中的高速部分，特别是CCD工作时钟发生器、FIFO、双端口RAM及闪存等读写控制电路。

Some analytical results are also presented . In the camera design , programmable logic devices are used to implement high-speed part of circuits , especially , CCD clock generators and access control modules for FIFO , dual-port RAM , and flash memory .

提出了信号产生模块的整体硬件方案，确定了相关器件型号，并对时钟发生器、DDS模块以及信号调理模块等关键部分的设计进行了详细讨论。

The overall design scheme of signal generation module is put forward . The type of relevant device is determined , and the clock generator , the DDS module , the signal conditioning module and other key part of the design are discussed in detail . 4 .

详细介绍了DSP时钟发生器、JTAG接口、整流滤波、三相逆变桥、保护电路、开关电源等工作原理及电路设计；编制了软件功能模块，完成了样机的调试与测试。

This paper details the working principle and circuit design of DSP clock generator , JTAG interface , rectifier and filter , three-phase inverter bridges , protection circuits and switching power supply , etc. The design of frequency control system is adapted to different types of induction motors within power .

浅析通信系统中的准确度与时钟发生器技术

Accuracy and Clock Generators-The Significance of PPM for Communication Systems

一种高稳定度片内时钟发生器的研究与设计

Study and design of an on chip clock generator with high stability

为了节省功耗，其详码器、振荡器和时钟发生器均有入睡／唤醒控制。

The sleep / awake control also be provided for saving power dissipation .

一种经济的时钟发生器&单阻晶体振荡器

An Economical Clock Generator & SingleResistor Crystal Oscillator

基于DDS+PLL技术的高频时钟发生器

High-frequency Clock Generator Based on DDS Hybrid PLL

介绍了一种基于电荷泵型锁相环的高速多相时钟发生器。

A high-speed multi-phase clock generator based on charge-pump phase-locked loop ( PLL ) is presented .

可编程的时钟发生器

Circuits for programmable clock generators

该数字电路包括时钟发生器和数字校正电路。

Circuit techniques used to achieve this level of power dissipation include clock generation and digital correction .

升压高电平时钟发生器

Boosted-high level clock generator

这种商用集成芯片可用于本振合成回路，高精度时钟发生器等。

This commercial integrated chip can be used in the local oscillation circuit , high-accuracy clock generator and so on .

还集成片内基准电压源和片内时钟发生器，因此在电容传感器应用中无需任何额外外部元件。

The on-chip voltage reference and the on-chip clock generator eliminate the need for any external components in capacitive sensor applications .

这套宽带高精度可变时钟发生器的产生方案可用于任意波形发生器、示波器、逻辑分析仪等数字化测试仪器中。

The clock generator can be used for arbitrary waveform generators , oscilloscopes , logic analyzers and other digital test instruments .

计时器可以执行功能，如频率测量，事件计数，间隔测量，时钟发生器，延迟时间等。

The timer can perform functions like frequency measurement , event counting , interval measurement , clock generation , delay timing , and so on .

表示晶体时钟信号发生器。可指定电极数目。

Represents a crystal clock signal generator . Number of electrodes can be specified .

电视台时钟台标发生器

TV station clock mark generator

逻辑控制电路设计：D触发器、不重叠时钟脉冲发生器等模块的设计。

Logical control circuit design : this part includes the design of DFF , non-overlap clock generate and so on .

卫星钟控制的伪随机码信号经卫星天线传播延时到达接收机，接收机时钟控制的发生器产生本地码，经位移码电路送至相关器与接收的卫星信号进行运算得到相关输出。

Pseudo-random code signal controlled by satellite clock was transmitted to receiver time delay via satellite antenna , native code was generated generator controlled by receiver clock , and sent it to correlator through displacement circuit , then native code and received satellite signal was calculated to gain coherent output .

文章从理论上指出了设计时钟脉冲控制器与变速时钟发生器的必要性，同时介绍了它们的工作原理和设计方法。

It also introduces their operating principles and design methods .