存储体

  • 网络Memory Bank;Storage
存储体存储体
  1. 所述读取指针连接到存储体,用于寻址第二存储器位置,以将存储在其中的数据读取到输出数据总线上。

    The read pointer is connected to the memory bank for addressing a second memory location to read a datum stored therein onto an output data bus .

  2. 但如果数百万计的已内嵌在谷歌庞大存储体上的章节片段、专著、戏剧和悲剧作品再一次重见天日的话,似乎越来越有可能需要这一格局有所调整。

    But it seems increasingly likely that adjustments will be needed if the millions of tracts , treatises , thrillers and tragedies already embedded in Google 's vast memory bank are once more to see the full light of day .

  3. 一种n×n矩阵在n个存储体中的无冲突访问存储方案

    Conflict Free Access for n × n Matrix in n Banks Memory

  4. 为RDS模块、一级Cache和二级Cache的存储体提出并实现了一种专用的测试芯片设计方案,完成了电路设计与版图设计。

    A specific test chip design plan has been proposed for the RDS module , level-one and level-two cache memory .

  5. 采用两帧存储体轮换工作机制,省掉FIFO器件,降低成本;

    The mechanism of adopting rotation working between two frames spares the instruments of FIFO and cuts the cost .

  6. 通过记录缓冲器和对存储体的改造,RBC能够过滤大部分不必要的存储体访问,有效地降低了Cache的功耗。

    With the record buffer and the modification on data array , RBC can filter most of the unnecessary cache activities , thus reducing energy consumption significantly .

  7. 其次以该混合模型为基础建立存储体性能目标函数,采用仿生优化算法&蚂蚁算法优化嵌入式SRAM结构,使之达到最优设计;

    Secondly , based on embedded SRAM performance hybrid model , this article adopts bionics algorithm-ant algorithm to optimize hierarchical embedded SRAM structure .

  8. 本文研究利用PC机扩充槽设计图象存储体与PC机的DMA接口,包括接口电路和接口驱动程序。

    This paper studies the designing of the interface between the image memory and the PC computer utilizing the PC expander , contains the interface circuit and the driving program .

  9. 设计了乒乓存储体用作主机和处理器阵列数据传输的缓冲区。另外还扩展出了4个UART串口。

    A ping-pong memory was designed as the cache for the transfers between the host and the processor array , and four UART serial ports were extended .

  10. 存储体单元是静态随机存储器(SRAM)最基本、最重要的组成部分,它在改善系统性能、提高芯片可靠性、降低成本与功耗等方面都起到了积极的作用。

    Memory Cell is a basic and important macro block of SRAM . It has played a positive role in improving performance and reliability , lowering cost and power consumption .

  11. 我们想要处理什么问题,就把相应的程序指令写入ACE的存储体,然后它就被“设定”为运行这套程序。

    When any particular problem has to be handled the appropriate instructions for the computing process involved are stored in the memory of the ACE and it is then ' set up ' for carrying out that process .

  12. Quartus环境以FPGA为数字电路和存储体载体,运用DDS技术虚拟实现任意信号产生,并在信号低频段仍能保持恒定很高的频率相对精度。

    A virtual arbitrary waveform generator in DDS is introduced , in which FPGA is used for the digital circuits and memory carriers in Quartus , the constant high relative frequency precision can be realized in the low frequency area .

  13. 介绍三星电子研发的多媒体存储卡的MMC串行通信协议的总线拓扑结构、存储体阵列分区、命令格式与命令集合、响应格式与响应意义以及各种读写操作时序和实际应用。

    Describes the bus topology architecture , memory array partitioning , command structure and command set , response structure , the read and write operation timings and the practical applications of the serial communication protocol of the Multi Media Card manufactured by Samsung Electronics .

  14. 对并行存储体台数为素数和2~n的平均效率给出了定量的表示。

    A quantitative representation of average efficiency against M is derived .

  15. 系统采用电子硬盘作为存储体。

    Electronic hard disk is used in the system for storage .

  16. 图象存储体与PC机接口设计

    Design of the interface of the image memory with the PC computer

  17. 一种二维转置多通道读写存储体组件的设计与实现

    Design and Implementation of a 2-D Transpositional Multi-Channel Read / Write Memory Module

  18. 邻域图像帧存储体的理论及其实现

    Principle and Realization of Neighborhood Image Frame Buffer

  19. 显示/隐藏大容量存储体设备(硬盘、软盘)

    Shows / Hides mass storage devices ( hard disk , floppy disk , etc. )

  20. 机器具有电子的核心设备和很大的存储体,

    There is a certain central pool of electronic equipment , and a large memory .

  21. 在这种访存方式下,访存地址的计算由计算阵列完成,然后由访存单元完成对存储体的访问。

    In this mode , computing array fulfills the address computation , then memory accessing unit complete the memory accessing .

  22. 三星声称这种存储体的数据读取速度要比采用内存+非易失性存储设备的组合快30倍左右。

    Samsung estimates that it can process data as much as30 times faster than a combination using typical RAM and storage .

  23. 本文对CF卡的特点作了重点介绍,分析了采用CF卡作为海量高速存储系统存储体的原因。

    This article emphasis on the characteristic of CF card and explain why to use it as the memory in this system .

  24. 运用了传统的存储体分块、字线分割技术以减少负载电容,降低功耗。

    The memory is partitioned into several banks and the word lines are divided to reduce the load capacitance and then reduce theirs power .

  25. 在每一站的流水操作中,出色的完成了存储体的分体控制、大小端数据传输模式的实现、跨边界存储访问等关键技术。

    Some technologies are achieved excellently , such as the separate-memory control , transmission mode and misaligned memory access at each station of pipeline operation .

  26. 理论上,哈希表是一个非常简单的构造,就是数组或链表的集合被划分到有限数量的存储体中。

    In theory the hash table is a rather simple construct , just collection of arrays or linked lists divided into a finite number of buckets .

  27. 因为它把一切都集中到了一个新的问题上:构造一个大容量、高速、有效、共用的存储体。

    For it threw all the emphasis on to a new place - the construction of a large , fast , effective , all-purpose electronic ' memory ' .

  28. 阐述了基于电诱导透明原理的慢光缓存器、以啁啾光栅为存储体的光栅型缓存器,以及以光纤为存储体的光纤环路型缓存器的原理、研究进展和存在问题,讨论了设计原则和改进措施。

    The principle progress and existing problem of slow light buffer based-EIT ( electric induced transparency ), buffer based-chirped grating and buffer based-fiber loop are described . The general design rule and improving measure of these buffers are discussed .

  29. 深入研究了通用寄存器文件的逻辑和电路设计优化技术,优化设计了端口共享、读写时间错开式的读写控制电路,并完成了存储体的优化设计;

    Thoroughly investigated the technology of how to optimize the schematic and circuit design of the register file , developed the shared write / read port , timing-sharing write / read control circuits , and optimized the storage cell design ;

  30. 在体全息数据存储文件系统原型系统的基础上,对模拟的全息存储体进行文件级的测试,结果证明二维分配策略能有效地提高文件数据块分配的连续性。

    On the prototype system of VHDS , testing of the allocation strategies of data-block in the " file " level was made . The testing results prove that two-dimensional allocation strategy can make file data-blocks to be allocated more consecutive .