协处理器

FPGA作为协处理器完成图像的采集和预处理。

The FPGA was used as a coprocessor for image acquisition and pre-processing .

基于网络处理器及协处理器的高速网IDS的研究

Study on High-speed Network IDS Based on NP & Coprocessor

一种高性能大数模幂协处理器SEA

SEA : A High-Performance Modular Long Integer Exponentiation Coprocessor

一维离散Fourier变换的阵列协处理器设计

The Design of Array Co-Processors for One - Dimensional Fourier Transform

FPGA作为协处理器，主要用于控制脉冲。

FPGA is as coprocessor which is mainly used to control pulse .

COMMONLISP语言在Prolog/Lisp协处理器板上的实现

The implementation of Common Lisp on prolog / LISP co-processor board

面向家庭网络的Java协处理器研究与开发

Java Coprocessor for the Home Network

其中DSP为主处理器，FPGA为协处理器。

In this system DSP is the main processor and the FPGA is secondary processor .

基于协处理器的无线传感器网络MAC设计

Design of MAC for wireless sensor networks based on co-processor architecture

基于FPGA的AES密码协处理器的设计和实现

Design and Implementation of AES Crypto Coprocessor Based on FPGA

本设计以高速DSP芯片为核心处理器，FPGA为信号的协处理器。

The DSP chip works as the core processor at high speed , FPGA works as the coprocessor .

Sun3/4专用协处理器PLC系统中COMMONLISP编译器的代码优化措施

The code optimizing techniques of Common Lisp compiler in PLC coprocessor system based on sun3 / 4 workstations

8087数值协处理器CMOS电路的设计

Design of 8087 Math Coprocessor CMOS Circuit

低成本的密钥长度可配置RSA密码协处理器VLSI设计

VLSI Design of a Low Cost and Reconfigurable RSA Crypto - Processor

一种新型椭圆曲线密码系统协处理器的VLSI设计

VLSI Design of a New-Type Coprocessor for Elliptic Curve Cryptosystems

无线传感器网络节点中AES协处理器的设计

Design of AES Coprocessor Used on the Node of Wireless Sensor Network

一种适用于智能卡应用的RSA协处理器

Design of an RSA Coprocessor for Smart Card Application

系统由DSP作为主处理器进行全局控制，利用具有流水线并行处理结构的FPGA作为协处理器实时完成DSP分配的处理任务。

DSP serves as primary processor to control the whole system flow , while FPGA as coprocessor with pipeline parallel processing .

提出了一种集成模乘求逆双重运算的抗攻击RSA协处理器设计。

An attack-resisted RSA coprocessor integrating multiplication and inverse is presented in this paper .

RSA协处理器的设计与实现。

The design and implementation of RSA coprocessor .

高速可配置RSA密码协处理器的ASIC设计

ASIC design of a high-speed reconfigurable RSA cryptography coprocessor

在传统设计中，CPU以外的计算资源都是被视为系统中的I/O设备或者协处理器来管理。

Conventionally , the computing resources excluding CPU in system are viewed as I / O device or coprocessor .

基于无线传感网络的AES协处理器设计

AES Coprocessor Implementation Based on Wireless Sensor Network

一种小面积的高吞吐率AES协处理器设计

A Small-area Design of High Throughput AES Coprocessor

IBMPc/XT微型机FORTRAN新版编译程序和8087协处理器的应用

On Application of An Updated FORTRAN Compiler and the 8087 Coprocessor to IBM PC / XT Computer

集成模乘求逆双重运算的抗攻击RSA协处理器

Attack-resisted RSA Coprocessor Integrating Multiplication and Inverse

基于Barrett模乘算法的RSA密码协处理器设计

Design of RSA crypto-coprocessor based on the Barrett 's modular multiplication algorithm

基于Montgomery算法的智能卡RSA密码协处理器

Montgomery Algorithm Based RSA Cryptography Coprocessor for Smart Card Application

TTA结构数字信号协处理器数据Cache的设计与实现

Design and Implement of Data Cache for Digital Signal Coprocessor Based on TTA

IPSec安全协处理器的研究与设计

Research and Design of IPSec Cryptographic Coprocessor