与门

  • 网络AND gate;Gate;ANDgate
与门与门
  1. 多排螺旋CT脾脏灌注与门脉高压症的相关性研究

    Research on the splenic perfusion and portal hypertension using multidetector CT

  2. 实验性肝硬化肝脏CT灌注与门脉压力的相关性研究

    A relative study of hepatic perfusion and portal vein pressure in rats with liver cirrhosis

  3. 他刚一进去,与门相连的门铃便嗡嗡作响。

    His entrance was announced by a buzzer connected to the door .

  4. 看一看这门框是否与门吻合,如果吻合,就把它安装好。

    See if the frame fits to the door , and if it does , then finish making it .

  5. 目的应用螺旋CT行肝动脉期与门静脉期双期扫描分析小肝癌的诊断特征。

    Objective The arterial phase and portal venous phase scan with helical CT was applied to analyze the characteristic of small hepatocellular carcinomas ( SHCC ) .

  6. 肝癌合并肝动-静脉瘘DSA表现及其与门脉高压间的关系

    DSA analysis of hepatic arteriovenous fistula concurrent with hepatic cancer and relationship between it and portal hypertension

  7. 方法回顾性分析了3例门静脉海绵样变患儿的间接门脉血管造影图像,观察其特征性的血管造影表现,同时与门脉多普勒超声及CT检查相对照。

    Methods The arterial portography of 3 cases of children 's cavernous transformation of the portal vein were retrospectively studied and compared with color Doppler ultrasonography and CT .

  8. 血浆CGRP水平与门静脉和脾静脉的直径呈显著正相关。

    Plasma level of CGRP were positively correlated with diameters of portal veins and splenic veins .

  9. 低压ECL或与门双极型电路设计方法

    A Low-voltage ECL OR-AND-gate and Synthesis of bipolar circuits in component level

  10. 肝硬化大鼠出血性休克后血内毒素、TNF(-α)、NO水平的变化及其与门静脉压力的关系

    The endotoxemia , tumor necrosis factor and nitric oxide release after hemorrhagic shock and their influences on the portal pressure in rats with cirrhosis

  11. 癌组织中VEGF-C的表达与门静脉癌栓、肝门淋巴结转移和复发有关(P0.05)。

    The expression of VEGF-C was correlated with portal vein-emboli , lymph node metastasis and recurrence ( P0.05 ) .

  12. 1998年,文献[1]提出了或记论的的概念,提出一个基本RS触发器只要用一个或记门(即普通的与门域门)就可以实现。

    In 1998 , a new concept Or-memory gate [ 1 ] is proposed . It supposed that just one gate is possible to structure an R-S flip-flop .

  13. HO-1、HO-1mRNA在肝硬化病人肝组织中的表达及与门静脉压力的关系

    Relationship between Portal Pressure and the Expression of HO-1 、 HO-1 mRNA in Liver of Patients with Hepatic Cirrhosis

  14. 胆管结扎肝硬化犬血浆TXA2/PGI2变化及其与门脉血液动力学的关系

    Relationship between splanchnic plasma thromboxane A_2 / prostacyclin levels and portal hemodynamics in cirrhotic dogs

  15. 提出一种基于级联半导体光放大器(SOA)中的交叉增益调制(XGM)效应实现的全光逻辑与门新方案。

    Novel scheme for all-optical AND gate based on cross-gain modulation in cascaded two stage semiconductor optical amplifiers ( SOAs ) is presented .

  16. APS的分流程度与HCC病理类型无显著性差异,但与门静脉受侵或癌栓形成有显著性差异。

    There was not significant correlation between HCC pathologic category and grade of APS , but with the presence of portal vein invasion and cancer embolus .

  17. 将PWM波和IGBT开关电平信号同时加在与门输入端,可斩波控制逆变器的输出电压。

    When PWM wave and IGBT switch level signal was loaded into input-end of and-gate at the same time , output voltage of inverter is controlled in chopped wave .

  18. 在这篇论文中,我们在先前提出的基于粘贴DNA计算模型的分子逻辑与门的实现方法的基础上,进一步提出了基于粘贴DNA计算模型的分子逻辑或门和与非门的实现方法。

    How to realize molecular logic OR gate , NOT gate and NAND gate based on sticker model of DNA computing and approach to implementation of molecular logic AND gate presented previously , which is proposed in this paper .

  19. 然后针对故障树建立了与门、或门、表决门和热储备门的Petri网模型,并建立了航空电子综合化系统的可靠性Petri网模型。

    Contrapose the FT , four kinds of Petri Net models related to series or , and , vote , hot reserve are built . Simulate the reliability Petri Net models of avionics system .

  20. 提出了一种基于同一结构实现全光逻辑与门和或非门的新型方案,其理论基础是级联单端半导体光放大器(SOA)的交叉增益调制效应。

    A novel scheme for all-optical logic AND and NOR gates is proposed based on the same structure , and the principle of operation is the cross-gain modulation in cascaded single-port-coupled semiconductor optical amplifiers ( SOAs ) .

  21. 在电路三要素(信号,网络和负载)理论的基础上提出双极型ECL元件级电路通用综合方法,并依此理论设计出一种新型低压ECL或与门电路。

    A universal synthesis of the bipolar ECL circuits in component level is presented , based on the theory of three essential circuit elements .

  22. 血浆ET1和GLU水平与门静脉和脾静脉的直径以及脾静脉的流量呈显著正相关。

    Plasma levels of ET-1 and GLU were positively correlated with portal vein diameters , splenic vein diameters and splenic vein flows .

  23. 在门静脉缩窄大鼠,这种功能性部分与门静脉缩窄造成的PVP升高幅度相似。

    In the portal vein stenosis rats , the functional part was similar to the increment of PVP owing to the increase of portal venous resistance ( PVR ) .

  24. 文章推广了Wang氏RC梯形电路模型,对互连线阶跃响应上升时间与门电路参数的关系进行了仿真研究,给出了定量结果。

    With the extension of Wang 's RC ladder circuit model , simulations were executed on the relation between the rising time of step response of interconnect and the parameters of gate . The quantitative results were presented .

  25. 报道了带门极双层Si-δ-掺杂GaAs样品中的二维电子系统Hall效应的低温测量实验,观察到了电子耗尽过程中电子浓度与门电压的奇特、复杂的非线性关系。

    The low-temperature measurement of Hall effect of the two-dimensional electron system in a double-layered gated Si - δ - doped GaAs is presented . A complex peculiar nonlinear dependence of the depletion on gate voltage is observed .

  26. 本文还讨论了PCT与门脉血栓(PVT)、PCT与门静脉气泡的鉴别要点。

    The paper , otherwise , also discussed the differential diagnosis : PCT and portal vein thrombosis ( PVT ), PCT and bubble in the portal vein .

  27. 肝硬化患者HA、LN及IV-C变化与门脉血流变化对胃运动影响的相关性研究

    The relationship between the variations of the levels of hyaluronic acid 、 laminin and collagen IV and blood flow of portal vein and gastric motility in the patients with cirrhosis

  28. 简要介绍了数字VLSI电路高层测试的概念,主要的高层测试方法,高层测试中所采用的故障模型及其与门级stuck-at故障的对应关系;

    High-level testing of digital VLSI circuits is briefly reviewed . The most important high-level test approaches are described . High-level fault models and its mapping with the stuck-at faults are presented .

  29. 基于该方案设计了三值反相器、文字运算电路、三值与门/与非门和或/或非门等基本电路,并采用标准CMOS工艺来实现这些电路。

    On the basis of the proposed scheme , the ternary inverter , literal , ternary AND / NAND and OR / NOR gates with less complex structure were designed , and the standard CMOS process was adopted without any modification of the thresholds .

  30. 以逻辑门电路&与门为例,以SDT为工具,说明了应用SDL进行特性描述和仿真验证的方法。

    This paper gives a logical gate circuit-and gate as an example to explain the method of applying SDL to describe and simulate / validate the hardware characters by the SDT tool .