算术逻辑运算

设计RISC51IPCore数据通路，重点是算术逻辑运算单元的实现。

Design the data path of the RISC 51 IP CORE . emphasis on the Arithmetic Logical Unit ; 3 .

算术逻辑运算单元（ALU）决定着中央处理器（CPU）的性能，而加法器又决定着ALU的性能。

The arithmetic logic unit ( ALU ) decides the performance of the Central Processing Unit ( CPU ), while the adder decides that of the ALU .

算术逻辑运算器：执行运算功能的中央处理器内的线路。

ALU : Arithmetic Logic Unit ; the circuitry within the CPU which performs all arithmetic functions .

控制器有自己的一套指令集，包括算术逻辑运算指令和基本的控制指令。

There is an instruction set for controller , containing arithmetic and logic operations and basic control commands .

给出了一种加密速度快，安全性高，加密算法和解密算法相同，且不需进行算术逻辑运算等特点的对称加密算法。

A quick and safe encryption arithmetic of symmetry is proposed , which has the same arithmetic in encryption and decryption without arithmetic logical operation .

执行单元负责处理器的算术逻辑运算，是处理器的核心单元，大多数指令都在这个单元中进行运算操作。

The executing unit charging for arithmetical and logical computing of processor is the kernel of Microprocessor , and most instructions ' computing is carried out in this unit .

它克服了传统并联电梯调度算法中只考虑召唤的方向以及实时性差的缺陷，并利用微处理器强大的算术逻辑运算和通信功能，采用实时智能优化调度算法，实现快速服务，达到最佳运行效率。

The system makes use of stronger functions of single-chip in arithmatic , logic and communication . By adopting intelligent optimum attemper method , speediness service and best circulate efficiency have been obtained .

本实验系统能够让学生完成有关计算机组成原理的部件实验和整机实验：部件实验包括加法器、乘法器、除法器、算术逻辑运算单元、控制器、存储器等；整机实验可以独立实现各部件的功能描述。

This experimental system will enable the students to experiment on both individual components and the whole machine . The former include the adder , multiplier , divider , arithmetic logic unit , controller , memory and etc. ; the complete machine experiment can perform functions of each individual component .

GB/T5271.2-1988数据处理词汇02部分算术和逻辑运算

Data processing Vocabulary Section 02 : Arithmetic and logic operations

算术及逻辑运算部件数据流

Arithmetic and logic unit data flow

注：处理器至少包含有一个指令控制器和一个算术与逻辑运算器。

Note : A processor consists of at least an instruction control unit and an arithmetic and logic unit .

在适于采用内建自测方法进行可测性设计的电路中，累加器往往是一种被普遍采用的基本单元，如通用处理器和数字信号处理电路中的算术及逻辑运算电路。

Accumulators composed of adders and registers are commonly used building blocks in general-purpose processor based on data path architecture with an arithmetic and logic unit , as well as in digital signal processing circuits .

中央处理器，或者说CPU，是计算机的大脑。是执行算术和逻辑（运算）功能的部件。

The central processing unit , or CPU , is the brain of a computer . It is where arithmetic and logical functions are performed .

对于数据而言，改变其形式或存储位置，对它执行算术运算、逻辑运算或转移操作。

With respect to data , to change its form or location ; to perform arithmetic , logic , or transfer operations with it .

类微计算机指令系统指令中指明将要完成的算术运算或逻辑运算类型的那一部分，而不是操作数地址的部分。

The part in an instruction that specifies the kind of arithmetical or logical operation to be performed , but not the address of the operands .

算术逻辑单元，用来进行算术逻辑运算。

The arithmetic logic unit ( ALU ), which performs arithmetic and logical operations .

本文所设计的运算模块实现了桶式移位器、算术逻辑单元以及32位乘法器，支持ARM指令集中所有算术运算和逻辑运算。

The executing module designed by this article implements barrel shifter , arithmetic and logic unit ( ALU ) and 32-bit multiplier and supports all the logical and arithmetic operations of ARM instruction set .