流水线结构

自适应流水线结构可根据帧内预测模式自动调整流水线的级数，能够降低工作频率和消除冗余的时钟，从而可以减少延迟，降低功耗。

The self-adoptive pipeline can adjust the stage of pipeline according to intra prediction mode . It not only helps to save power since it reduces the design frequency and eliminate the redundant cycles , but also reduce latency . 2 .

基于并行流水线结构的可重配FIR滤波器的FPGA实现

FPGA Implementation of Reconfigurable FIR Filter Based on Parallel Pipeline Structure

进而提出了一个新的服务器结构：流水线结构（Pipeline）。

A new taxonomy of architectures of servers is presented .

8位精度200MHz流水线结构CMOS电压比较器

A 200 MHz Pipelined CMOS Comparator with 8 Bit Accuracy

流水线结构RS（255223）译码器的VLSI设计

A VLSI design of pipeline rs ( 255,223 ) decoder

高速FIR滤波器的流水线结构

A Pipeline Architecture for High Speed FIR Filters

基于两层流水线结构的FIR滤波器设计

FIR Filters Design Based on Two-Hierarchy Pipeline Structure

CPU的流水线结构

The Structure of Pipeline of CPU

基于流水线结构的高速嵌入式MCU设计

A High-Speed Embedded MCU Based on Pipeline Structure

提高FFT处理速度的主要途径是采用流水线结构和并行运算。

The main approaches of improving FFT processing speed include pipeline and parellel architecture .

然后论文提出了一种流水线结构的基于对象模型的快速Warp变换算法。

Second , this dissertation gives an algorithm of object-based fast warping .

FPGA实现流水线结构的FFT处理器

FPGA Implementation of Pipelined FFT

合成孔径雷达（SAR）实时成像处理是一种典型的流水线结构，要分为很多步骤分开进行处理，并且数据量大，算法复杂。

The SAR real-time imaging process is a typical pipelined structure , which includes many complicated algorithms such as FFT .

提出了一种开关电容流水线结构A/D转换器（ADC）的速度分析方法。

A speed analysis methodology for a switched-capacitor pipelined A / D converter is presented .

数字信号处理（DSP）具有并行的硬件乘法器、流水线结构以及快速的片内存储器等资源，其技术广泛地应用于数字信号处理的各个领域。

DSP technologies have applied in every field of digital signal processing because of its parallel multiplier , pipeline structure and fast On-Chip memory .

采用CORDIC流水线结构的FFT处理器的改进

Improvement on FFT processors based on pipelined CORDIC architecture

与其它结构相比，流水线结构（PipelinedArchitecture）ADC的特点是既能实现高速又能实现相当的分辨率。

Compared to other architectures , the pipelined architecture ADC is creditable for its high speed and high resolution .

基于流水线结构的高速专用DMA系统设计

Design on a Pipeline-Based High-Speed Specific DMA System

同时，对流水线结构ADC功耗与速度进行了折中分析，为了实现低功耗，采用了分辨率为每级1.5位的流水线结构。

By analyzing the tradeoff between the speed and dissipation , 1.5bit/ stage pipeline ADC is adopted .

流水线结构ADC具有能同时实现高采样速率和高分辨率的特点。

The pipelined ADC architecture has the characteristics of high sampling rate as well as high resolution .

同时提出了采用并行流水线结构进行该方法的在系统芯片（SoC）实现。

A parallel pipeline architecture is proposed to implement the proposed method in System on Chip ( SoC ) .

并采用乒乓RAM的结构提高运算能力，得到流水线结构。

And Ping-Pong RAM structure is used to improve the efficiency of the computation and to gain pipeline structure .

CORDIC流水线结构在FFT设计中的改进

Improvement on CORDIC Pipeline Architecture in FFT Design

而在实现高速高精度ADC的各种结构中，流水线结构是最常用的。

Among all structures of high-speed and high-resolution ADCs , the pipeline structure is the most popular one .

设计一种可以连续计算N点复数序列傅里叶变换（FFT）的流水线结构处理器，其序列长度N（为2的幂）可变。

A pipeline processor which may compute various 2 ~ n points FFT is proposed for continuously performing complex points fast Fourier transforms ( FFTs ) .

FPGA在分布式计算、并行处理、流水线结构上有独特的优势，自然成为设计软件无线电系统的首选技术之一。

FPGA has become the first choice for designing the software radio system because of its unique advantages in distributed computing , parallel processing and pipelining .

由于RISC具有流水线结构和指令多样性的特点，传统的CoVerification方法使RISC验证工作复杂而艰巨。

Because the RISC has pipeline structure and various instructions , the traditional verification process Co-Verification is very complex and arduous .

CPU采用五级流水线结构，通过对指令集分析确定了其系统结构划分成取指模块、运算模块、寄存器堆模块、系统总线模块和控制器五大模块。

The CPU design is divided into five parts : instruction-fetching module , executing module , register-file module , system-bus module and controller module .

RISC体系结构的重要特点是其便于利用流水线结构进行指令操作。

The crucial trait of RISC architecture is that it can fit the pipeline compatibly .

在流水线结构A/D转换器中，参考电压的波动将会影响到其转换精度。文章分析了参考电压变化对A/D转换器整体性能的影响，通过Matlab仿真加以验证。

The influence of the variation of reference voltages on the overall performance of the A / D converter is analyzed and the result is verified by Matlab simulation .