逻辑门电路

采用0.35μMBiCMOS工艺技术，设计了三种高性能的BiCMOS三态逻辑门电路，并提出了改进三态门电路结构和优化器件参数的方法和措施。

Kinds of high-performance BiCMOS tristate logic gates have been designed and some new methods of modifying the gate structure and using optimal device parameters have been also proposed by adopting 0.35 μ m process technology .

在逻辑门电路测试技术中，可以在泛序测试法基础上建立故障诊断树，用于完成单电路故障的检测与定位诊断。

In the technologys of logic circuit test , we can use diagnosis tree to finish the test of logic element fault .

MOS逻辑门电路的功率损耗与其门电路的输出翻转成正比。

Heat dissipation in MOS gate is in direct Proportion to its output switching activity .

针对EWB中NATIVE模型的缺陷，提出spice模型TTL逻辑门电路，并对参数调整进行讨论，获得仿真度较高的基本TTL逻辑门电路。

In view of the flaw in the NATIVE model of EWB , this article proposed the Spice-based TTL logical gate circuit , and discussed to the parameter adjustment , obtained the high like TTL logical gate circuit .

以逻辑门电路&与门为例，以SDT为工具，说明了应用SDL进行特性描述和仿真验证的方法。

This paper gives a logical gate circuit-and gate as an example to explain the method of applying SDL to describe and simulate / validate the hardware characters by the SDT tool .

本文介绍了快速单磁通量子（RSFQ）电路的基本原理和部分逻辑门电路工作原理及其设计注意点。

In this paper , the principles and characteristics of rapid single flux quantum ( RSFQ ) circuits are discussed .

本文着重研究忆阻器在混沌电路和逻辑门电路构造中的应用潜力。

This thesis focuses on the potential applications of memristor in chaotic circuit and logic gate structure .

约瑟夫逊结逻辑门电路

Josephson junction logic gate

从Ebers－Moll方程组出发，建立在矩形脉冲激励下的BJT反相器的非线性耦合微分方程.介绍了MATH程序语言在求解逻辑门开关电路的非线性耦合微分方程中的具体应用。

An application of MATH on deducing the nonlinear coupling differential equations of the BJT-Not gate , which is stimulated by rectangle pulse signal and is developed from Ebers-Moll equations is presented .

执行蕴含布尔操作的一种（逻辑）门电路。

A gate that performs the Boolean operation of implication .

最佳通用逻辑门的CMOS电路研究

Research of the CMOS Circuits for Optimal Universal - Logic - Gate

最佳通用逻辑门及ECL电路实现

Optimal Universal-Logic - Gate and Its ECL Circuit Realization

XNOR门是构成Reed-Muller逻辑的基本门电路，现有的XNOR门电路由于信号摆幅的不完全性而导致后级亚阈功耗的存在。

XNOR gate is the basic unit of Reed-Muller logic . The non-full swing signal in the existing XNOR gates causes the sub-threshold power dissipation .