形式验证

形式验证在SOC设计中的应用研究

Formal Verification Study in SOC Design

VLSI设计中的形式验证方法研究

Research on Formal Verification Method for VLSI Design

通信协议形式验证中的Petri网方法

Petri Net Method for the Formal Verification of Communication Protocols

SOC形式验证中的故障诊断

Error Diagnosis and Correction in Formal Verification of SOC

多值开关级代数在MOS电路形式验证中的应用

Application of multiple-valued switch-level algebra to the formal verification of MOS circuits

完成了SOPC系统芯片的后仿真与形式验证工作。

The post-layout simulation and formal verification tasks .

RETE网络中的优化编译模式及其PVS形式验证

Optimizing Compiler Schemas in RETE Network and their Formal Verification with PVS

基于MLD模型的混杂系统控制及其形式验证研究

Control and Formal Verification of Hybrid System Using MLD Model

在验证平台中，采用了形式验证的方法来实现PCI协议的描述，以保证验证平台本身的正确性。

In order to ensure the correctness of the testing platform , a method of format examination is adopted to realize the correct description of PCI protocol .

另外，还介绍了用于SoC功能验证的关键方法，包括断言和RTL形式验证，Farm，随机化测试激励和功能覆盖等。

Some other techniques are also introduced in this paper including : Assertion and RTL Formal verification , Farm , Random Test Stimulus and Functional Coverage .

在形式验证和ATPG中的布尔可满足性问题

Formal Verification and ATPG Using Boolean Satisfiability Problems

一个适于形式验证的ATPG引擎

An ATPG Engine for Formal Verification

在功能规约和测试生成的基础上，研究如何利用模拟方法加速和改进SoC系统形式验证方法，特别是模型级和事务级行为的一致性验证方法。

Based on functional specification and test generation , this thesis studies how to accelerate and improve the system-level formal verification approach for SoC , especially for behavior consistence verification between model-level and transaction-level design .

CPS系统涉及信息、物理等多方面，本身复杂度高，而且CPS系统往往运行于不确定的物理环境中，这使得应用传统的形式验证技术去验证完全的系统行为变得不实际。

These systems are inherently complex and often run in the nondeterministic physical environment . This makes the traditional formal verification technology impractical to verify the complete system behaviors .

最后在EVC下编写了一个播放器应用程序，通过边解码边播放的形式验证了优化后的解码程序在ARM平台上实时解码的可行性。

Finally , we edited a player application under EVC and verified the feasibility of real-time decoding of the optimal decoding process by decoding side by side in the form of play .

文章首先介绍了SOC形式验证中故障诊断的概念和思想，然后分别讨论了两类故障诊断法：模拟诊断法和符号诊断法。

The concept and idea of error diagnosis and correction ( EDAC ) in formal verification of SOC are reviewed , and two approaches for EDAC , simulation-based approach and symbolic approach , are described in the paper .

根据Banach的不动点定理，我们定义了不扩张的进程表达式在这个完备度量空间上的度量指称语义，这项研究工作对形式验证和系统优化都具有重要的理论意义和现实意义。

Due to Banach 's fixed point theorem , we can define a metric semantics for the contractive process expressions on this complete metric space . This work is important for formal verification and systems optimization .

由于形式验证难以用于大型设计的测试，所以HDL验证的主要方法是通过大量的测试向量仿真HDL代码来完成。

Up to now , the best way of HDL verification is to simulate the HDL design with a massive amount of test pattern because formal verification techniques are frequently intractable for large design .

目前，在数字硬件设计全过程中，类似于VHDL的硬件描述语言（HDL）已能支持系统仿真、综合、测试和形式验证等大多数设计步骤。

Hardware description languages ( HDL ) such as VHDL are essential technology to support most of the steps of digital hardware design , such as simulation , synthesis , testing , and formal proof .

验证已成为系统芯片（SoC）设计所面临的重大挑战，形式验证所能验证的电路规模远远不能满足设计需要，基于仿真的验证方法一直占统治地位。

Verification has been one of the most important challenges to SoC design . Despite recent advances in formal verification , it can not meet the requirement of design . Simulation based verification method continues to be the workhorse .

包括对RTL代码进行逻辑综合、物理版图实现、设计规则验证、版图与网表一致验证、寄生参数提取、静态时序分析和形式验证等。

Including of RTL code logic synthesis , physical layout implementation , Design Rule Check , Layout with Schematic check , parasitic parameter extraction , Static Timing Analysis and format validation .

协同形式验证环境Co-Formal的建立与应用

Setup and Applications of the Co-Formal Verification Environment Co-Formal

基于FPGA的验证速度虽然没有硬件验证快，但是明显快于前两者，而且FPGA的验证环境是非常接近芯片设计的真实环境的。论文首先介绍了两种主要的验证方法，形式验证和功能验证。

The speed of FPGA-based verification is faster compared to the first two . FPGA verification environment is very close to the real environment of the chip design . Firstly , the paper introduces the two main verification methods , formal verification and functional verification .

仿真结果表明了论文算法在非线性CSTR过程的混杂控制、混杂形式验证上的有效性，为严重非线性的CSTR过程的控制提供了新的方法和思路。

Simulation results show promising performance in the hybrid optimal control and hybrid formal verification for the CSTR process . The dissertation presents a new control strategy for serious nonlinear CSTR process .

本文分别介绍了逻辑综合工具DC、物理设计工具ICCompiler、静态时序分析工具PrimeTime和形式验证工具Formality，总结了实现设计中的主要延时模型、寄生参数提取及时序优化方法。

Firstly , we introduced the logic synthesis tool Design compiler , physical design tool IC compiler , static timing analysis tool Primetime and logic equivalence check tool Formality . Then we summed up the main delay models , parameter extraction and timing optimization .

本文讨论了MOS电路多值开关级代数表达式的三种标准结构.给出了将多值开关级表达式转换成布尔表达式的定理.基于这些理论，提出了MOS电路开关级形式验证的一种方法。

Three standard forms of multiple-valued switch-level algebraic expressions of MOS circuits are discussed in this paper . Theorems on transforming multiple-valued switch-level expressions into Boolean expressions are given . Based on these results , a procedure for formal verification of MOS circuits at switch level is proposed .

甚至现在，形式验证主要地用于研究领域。

Even today , formal verification is mainly a research area .

软件形式验证与测试集成方法研究综述

A Survey on the Methodology Integrating Formal Verification and Conformance Testing

文章最后对形式验证的另一种技术&定理证明方法进行了相应的探讨。

In the end we discuss another technique-the Theorem Proving method .

论文首先对形式验证中的等价性检测方法进行了深入的探讨。

Thesis discuss in-depth about the equivalence checking at first .