运算电路

一种RISC单片机的运算电路

An Operational Circuit for RISC Microcontroller

FPU中一种高速乘法运算电路的设计与实现

A Design and Implement of a High-speed Multiplying Operational Circuit in FPU

而基于SAT的有界模型检验方法虽然能较快地发现反例，但它不支持包含数学公式的系统规范，因而难以用于验证运算电路。

SAT-based bounded model checking is powerful in bug finding , but it does not support specification with mathematic formula .

晶体管TL环运算电路原理及应用

The transistors TL operation circuit principle and practical use

快速完成Pascal三角形数值运算电路

Circuit to fast calculate Pascal triangle data

两种基本减法运算电路共模抑制比（CMRR）的分析

Analysis of CMRR of Two Basic Subtracting Circuits

该方法通过配置FPGA器件的时钟、逻辑运算电路以及静态存储器来实现A/D转换控制以及补偿分量的计算。

By means of configuring the clock sequence of FPGA devices , logic operation circuits and static memory the computation of control component and A / D conversion control can be implemented by the proposed method .

简要介绍了SPWM的产生方法，重点对产生SPWM的正弦表及其运算电路进行优化。

A way to generate SPWM is simply introduced in the paper , and the emphasis is stressed on the optimization of sine table and its operation circuit .

因此，基于形式化方法的运算电路验证方法，特别是完全自动化的模型检验方法，已经成为当前国内外科研机构以及EDA厂商所关注的热点问题。

Thus , using formal verification , especially model checking method ( an completely automated method ), to verify arithmetic circuits effectively becomes a hot spot concerned by world wide RD institutes and EDA vendors .

为了省免多值线性反馈移位寄存器中存在的常量乘运算电路，本文以三值逻辑为例，提出了具有Q-2Q双轨输出的三值CMOS触发器的设计。

In order to save the constant multiplier embodied in multiple-valued linear feedback shift register , this paper proposes a CMOS ternary flip-flop with Q-2Q dual-rail outputs .

基于该方案设计了三值反相器、文字运算电路、三值与门/与非门和或/或非门等基本电路，并采用标准CMOS工艺来实现这些电路。

On the basis of the proposed scheme , the ternary inverter , literal , ternary AND / NAND and OR / NOR gates with less complex structure were designed , and the standard CMOS process was adopted without any modification of the thresholds .

针对浮点计算，本文给出了一种两级流水线结构的双通道IEEE-754浮点标准的加法运算电路结构框图。

In design of high-performance FP adder , the author completes a two stage pipelining dual path IEEE-754 FP adder architecture .

运算电路模块是当代微处理器的关键组件。

Arithmetic circuit is one of the key components of modern microprocessor .

本文研究了算术运算电路的通路时延故障测试。

Delay fault test is researched for arithmetic circuits in this thesis .

用改进的查表法实现高速模运算电路

Implementation High-Speed Modular Arithmetic Circuit with Improved Look-up Table

能实现任意系数求和的运算电路

An Operational Circuit of Realizing Summation with Arbitrary Coefficient

微处理器电路设计的验证工作必须确保运算电路模块设计的正确性。

The verification of microprocessor design must ensure the correctness of arithmetic circuit .

基于连续逻辑的十值十进制算术运算电路的设计

A Design of the Ten-Valued Decimal Arithmetical Unit Based on the Continuous Logic

提出了一种新的宽频带对数运算电路的设计方法。

A new design method of the broadband logarithmic operational circuit is presented .

设计了简单可行的脉冲减法运算电路和馈送自动转换电路。

A pulse subtraction operated circuit and an automatic conversion feeding circuit are designed .

使用这种动态逻辑可以大大提高运算电路的速度。

The speed of arithmetic circuits can be improved dramatically by using this kind of dynamic logic .

本文还给出了求解（）上的乘法运算电路的最优并行度的方法，并给出一个表格供读者在设计电路时查阅。

This paper also presents a method for the solution of best parallelism degree of multiplier on .

基于T门的2-5混值/十值加、减运算电路设计

Design of 2-5 mixed-valued / ten-valued operation circuits of full adder and full subtracter based on T gate

算术运算电路包含加法器、乘法器等，在信号处理等领域中应用极为广泛。

The Arithmetic circuits which include adders and multiplies are widely used in many domains such as signal processing .

本文通过对编码技术的研究，提出采用2-5混值编码方案研究十值运算电路；

2-5 mixed-valued coding to research ten-valued operation circuits by the research of coding technique is proposed in this paper .

基于决策图的字级模型检验方法虽然能完全验证运算电路，但它从有缺陷的设计中发现系统规范的反例所需时间较长。

Word level model checking based on decision diagrams can verify arithmetic circuits completely , but its bug finding is time-consuming .

文章综合了振荡电路、加法、减法及比较运算电路，还论证了所设计的电路，及推导了有关公式。

Oscillation , addition , subtraction and comparison circuits are synthesized , all circuits designed are tested , some formulas are derived .

根据峰值运算电路，可以得到测量信号的强弱，从而判断出光路调整的好坏。

By the aid ofpeak detector circuit , the intensity of measuring signal and the propriety of the optical path adjustment can be known .

有源电力滤波器主要包括两个部分：指令电流运算电路和补偿电流发生电路。

Active power filter mainly consists of two parts , the first is current operation circuit , and the second is compensation current circuit .

该方案在加载数据的同时进行边界扩展，无须对运算电路进行逻辑控制，可以复用加法器，提高了资源利用率。

The design performed boundary extending while inputting datum without any logical control to ALU and multiplexed adder , can improved the utility of resources .