频率计

自适应快速高精度数字频率计片上系统设计实现

SOC Implemetation of Self - Adaptive , High Sensitive Frequency Counter

在本次毕业设计中我们选择使用单片机来制作数字频率计，并在实际制作中采用了直接测频法。

In this paper , we choose single chip microcomputer to make a digital frequency counter ; meanwhile , direct measurement is taken in practice .

基于ARM的嵌入式高精度频率计的设计

Design of high resolution frequency meter based on ARM

高精度数字频率计的FPGA设计实现

The design and realizing of high-accuracy digital cymometer in FPGA

基于单片机与FPGA的等精度频率计设计

Design of Equal Precision Cymometer by MCU and FPGA

基于CPLD及C语言的等精度频率计设计

The Design of Frequency Meter for Equal Observations Based on CPLD and C Language

基于FPGA自适应数字频率计的设计

Auto - adjusting digital cymometer based on FPGA

在DSP中实现声信号的频率计权、时间计权与FFT频谱分析。

And the frequency weighting , time weighting and FFT are realized in DSP .

用FPGA设计数字式频率计

Design digital frequency meter using FPGA

基于单片机和CPLD实现等精度频率计

Realizing the Equal Accuracy Frequency Accounts Based on MCU and CPLD

基于全相位FFT的高精度频率计系统研究

Research on High-Precision Cymometer System Based on All Phase FFT

还使用C语言设计了该等精度频率计的主控程序以提高测量精度。

And uses C language to design the main control program of the frequency meter for equal observations to make the meter more accurate .

用原理图法在单片CPLD上实现六位数字频率计

Implementation of Digital Frequency Meter Based on Single CPLD Device Using Schematic Method

目的获取中国男性青年坐姿Z轴振动的频率计权曲线。

Objective To obtain the frequency weighting contour for seated Chinese young males in z axis .

VHDL及其在数显频率计中的应用

VHDL and its application in frequency meter with digital display

本频率计采用的是全同步数字测频法并在FPGA可编程逻辑器件上进行设计实现。

This cymometer is designed by the complete synchronous digital frequency measurement method based on the programmable logic devices FPGA .

采用ISP技术及器件设计数显频率计

The Design of Numerical Frequency Meter with ISP Technology and Device

对于具有频率计数值的域散列，按照值对列表排序并打印前N个链接。

With this hash of domains with values of frequency counts , we sort the list by value and print out the first N links .

基于ISP器件的可编程变量程数字频率计的设计研究

Design of programmability variability range digital frequency meter based on ISP devices

介绍一种基于VHDL的采用自顶而下（uptobottom）设计方法实现的数字频率计。

The design method , which realizes digital frequency counter of up to bottom based on VHDL is introduced .

基于EDA技术的数字频率计的设计

Design on Digital Cymometer Based on EDA Technology

基于VHDL语言的数字频率计电路的设计

Design of Digital Frequency Meter Based on VHDL

基于ISP的数显频率计

The Design of Numerical Frequency Meter Based on ISP

用PIC单片机设计数字频率计

A Designing of Digital Frequency Meter Based on PIC

介绍了一种运用FPGA开发软件QuartusⅡ设计的数字频率计。

A digital frequency meter designed with FPGA development software Quartus II is introduced .

基于VHDL的数字频率计设计

Design of Digital Cymometer Based on VHDL

该频率计利用CPLD来实现频率、周期、脉宽和占空比的测量计数。

This cymometer uses CPLD to realize the measuring count of frequency , period , pulse width and occupy-empty ratio .

文中介绍了用CPLD设计制作十进制数字频率计系统的方法。

At last , the method of using CPLD to make decimal numerical frequency system is expounded in this article .

基于NIOSⅡ的多功能数字频率计的设计

Multi-Function Digital Frequency Meter Based on NIOS ⅱ

本文介绍了数字频率计的工作原理，应用VHDL设计的顶层文件及其运行结果。

This article introduces the principle of digital frequency indicator and presents VHDL top file and the results of its application .