闪存控制器

考虑到系统集成的需要，将实现的闪存控制器封装成符合处理器本地总线（ProcessorLocalBus，PLB）接口标准的IP核，并根据IP核实现底层驱动程序。

Considering the needs of system integration , the flash memory controller is packaged as IP Core , which accords with the processor local bus interface standard .

线性闪存控制器默认为禁用。

The linear flash controller is disabled by default .

测试结果表明设计的闪存控制器能够完成对闪存存储芯片的擦除、编程以及读取等操作。

Test results show that the flash controller can achieve the operations of erasing , programming , reading and so on , correctly .

利用闪存控制器核中的寄存器来模拟主机接口发出命令及数据信号，控制闪存控制器完成对闪存存储芯片的相关操作。

The registers within the core send out commands and data signals simulating the host interface , which directs the flash controller to complete the command operations .