门电路

提出了一种建立数字门电路宏模型的方法，采用该方法建立的门电路宏模型可以对门电路以及由门电路构成的数字电路进行逻辑仿真。

The said digital gate circuit marco model can be used to perform a logical simulation for gate circuit and the digital circuit formed by the gate circuit .

TTL门电路的Pspice仿真分析

Simulation Analysis for TTL Gate Circuit Using Pspice

对CMOS门电路的物理参数基于理想化的分析

Analysis of Physical Parameters for CMOS Gate Circuits Based on Idealization

用CMOS三值门电路构成的一种自校验二值逻辑系统

On the use of CMOS ternary gates to realize a self-checking binary logic system

CMOS门电路的功率与数据相关性

Correlation between power and data in CMOS gates

本文提出一种用CMOS技术实现三值门电路，再用这些门电路构成自校验二值系统的方案。

A scheme is proposed by which ternary gates realized with CMOS technology implement a self-checking binary system .

CMOS和TTL集成门电路多余输入端的处理方法

The method of processing a surplus input in CMOS circuit and TTL circuit

基于ECL门电路的UWB信号发生器的设计

Design of UWB Signal Generator Based on ECL Circuit

MOS逻辑门电路的功率损耗与其门电路的输出翻转成正比。

Heat dissipation in MOS gate is in direct Proportion to its output switching activity .

然后介绍了交流CMOS门电路的设计思想及结构与工作原理上的特点。

Furthermore , the design thinking and the characteristics of structure and working principle of AC CMOS gates are introduced .

对由TTL门电路组成的试验电路进行了计算机模拟和测试。

An experimental circuit composed of TTL gates has been developed .

总结了CMOS和TTL门电路在使用中多余输入端的处理方法。

This article summarizes CMOS and TTL gate circuits ' transactional methods at the redundant input port .

本文从理想参数出发归纳了直流CMOS门电路主要参数的设定思想并对各项参数进行了分析讨论。

Starting from ideal parameters this paper induces the idea of setting up main parameters of DC CMOS gates and analyzes various parameters .

本文介绍了在使用CMOS和TTL集成门电路时多余输入端的处理方法。

The paper gives the method how to process a surplus input in using CMOS circuit and TTL circuit .

TTL门电路带负载能力的计算问题研讨

Calculation of the load capacity in TTL circuit

十值TTL门电路的研究

Research on Deka - value TTL Gate Circuit

BiCMOS三态输出门电路的设计、制备及应用

Design , fabrication and application of BiCMOS tristate logic gates

本文应用带抑制弧的增广Petri网建立了基本门电路和常用触发器的Petri网模型；

The models of the basic gates and typical flip-flops for Petri net are constructed by using a kind of extended Petri net with inhibitor arc .

十值TTL或门及正循环门电路的研究

Discussion about the Circuit of Deka ? value TTL OR Gate and POS Loop Gate

门电路~（99m）Tc－MIBI心肌断层显像可同时评价心肌血流灌注及心室室壁功能。

Gated 99m Tc-MIBI myocardial imaging is a good method for the assessment of myocardial perfusion and ventricular function .

TTL六值与非门与七态门电路的研究

Discussion about the Circuit of TTL Six - value ' And-Not ' Gate and Seven State Gate

FPGA器件是一种可编程的逻辑阵列，属于专用集成电路（ASIC）领域中的一种半定制电路，它解决了原有可编程器件门电路数有限的缺点。

FPGA device is a kind of programmable logic array , which is belongs to Semi-custom circuit in the field of Application Specific Integrated Circuit ( ASIC ) .

本文分析了高温CMOS倒相器和门电路的瞬态特性，建立了它们的上升时间，下降时间和延迟时间的计算公式。

This paper analyzes transient characteristics of high temperature CMOS inverter and gate circuits , and gives computational formulas of their rise time , fall time and delay time .

论文设计了基于RT量子器件的二值与非门与或非门，设计的门电路结构简单，并具有量子器件所具有的速度快、功耗低、集成度高等优点。

The designed gates have simple configuration , they also have the advantages that quantum devices possess , so they can suit the requirement of VLSI .

最后论述了EWB下的Spice门电路模型的实现在实验教学中的现实意义。

At last , the practical significance of Spice gate model realization with the EWB in the experimental teaching was elaborated .

~（99m）Tc-MIBI心肌灌注显像结合门电路心血池显像对高血压患者心肌缺血诊断的评价

Evaluation of Myocardial Ischemia in Hypertensive Patients by ~ 99mTC-MIBI Myocardial Single-phone Emission Computed Tomography and Multigated Cardiac Blood Pool Angiography

采用自己研究出来的四值TTL门电路，设计出了四值RS触发器、D触发器和JK触发器。

A 4 value TTL gate circuit is used to design 4 value RS flip flop , D flip flop and JK flip flop .

1μm栅HEMTDCFL门电路及环形振荡器的设计与实验研究

Designing and Developing of HEMT DCFL Gate Circuits and Ring Oscillators with 1 μ m Gate-Length

文中的用门电路实现了数学算法，并用可系统编程的CPLD（复杂可编程逻辑器件）实现了脉冲发生电路、精密时间测量电路和同态滤波器。

In the paper all arithmetic way is implemented by hardware & CPLD ( complex program logic device ), including pulse-production circuit , precise - time measurement and homomorphic deconvolution filter circuit .

在MOSFET漏端pn结泄漏电流的影响下，高温CMOS倒相器和门电路的输出高电平下降，低电平上升，导致了电路的功能失效。

It causes invalidity of circuit functions that high output voltage of high temperature CMOS inverter and gate circuits falls and low output voltage rises under influences of leakage current of MOSFET 's drain terminal pn junction .