电源噪声

分析失调、MOS开关的寄生参数效应、充放电电流比例、电源噪声对A/D转换器的精度的影响，并提出相应改进措施。

Effects of offset , switch parastic parameter , the ratio of charge and discharge current , power noise in chaotic circuit were discussed in this paper .

结果表明：集成稳压器对电源噪声的响应均可视为稳态噪声，其抑制能力约为70dB；

The conclusions are as follows . The response of the integrated manostat to power noise can be regarded as steady noise , and the restraining ability is about 70 ?

低压降CMOS稳压器的电源噪声抑制分析

Analysis of Power Supply Rejection of Low Dropout CMOS Regulator

一种高电源噪声抑制宽线性范围CMOS压控振荡器设计

A High Power Supply Noise Rejection and High Linearity Range CMOS Voltage-Controlled Oscillator

高抗电源噪声的低时钟抖动VCO设计

Design of Low-Clock Jitter VCO with Strong Ability of Rejecting Power Supply Noise

在混合信号SoC中，高速数字电路产生的开关噪声及电源噪声通过衬底耦合传输到模拟电路和射频电路MOS晶体管的衬底，形成衬底噪声耦合，直接影响模拟电路、射频电路及整个SoC芯片的性能。

In mixed-signal SoC , switching noise and power supply noise caused by high speed digital circuits will affect directly the characteristic of analog circuits and RF circuits , even the whole systemic circuit capability .

然而，由于封装在高速系统中呈现出更大的电感性，几乎不可能在设计PDN时将高速接口中的电源噪声做到忽略不计。

However , the power supply noise cannot be ignored in the design of PDN , because the package in the high speed interface shows a greater inductive .

给出了简单而又有效的频域分析模型，并将其电源噪声抑制实测结果与频域分析模型理论结果及其SPICE仿真结果进行比较。

The power supply noise rejection ( PSR ) in frequency domain of the proposed circuit is discussed . A simple model for PSR analysis is developed and compared with the results of SPICE simulation and measurement of the implemented chip .

分析了电源噪声滤波器的基本原理，并对一个电源噪声滤波器实例进行了优化设计，经测试表明该滤波器对10kHz以上的电网噪声衰减效果能达到27dB，对1MHz的噪声衰减效果能达到80dB。

According to the basic elements of the Power Noise Filter , we optimize an example to prove its function . The result shows that that filter can weaken noise above 10 kHz by 27 dB and weaken noise above 1 MHz by 80 dB .

中频电源噪声研究及其抑制技术

Research on Intermediate Frequency Power Supply Noise and Its Elimination Technology

降低运放电路中电源噪声的方法探讨

Methods for Reducing Noise of Power Supply in the Operational Amplifier

一种适用于标准单元库的低电源噪声输出驱动器

A Low Supply Noise Output Driver for Standard Cell Library

开关电源噪声的形成及抑制方法

Noise Forming and Suppression Methods of Switching Power Supply

面向电源噪声的动态电流测试

Dynamic Current Testing on Power Supply Noise TRENDS

开关电源噪声对光纤陀螺精度影响的研究

Influence of the Noise of Switch Mode Power Supply on the Precision of FOG

开关电源噪声的抑制技术

Controlled Technique for the Switch Power Noise

对一种超低功耗能隙源的电源噪声抑制进行了分析。

The power supply noise rejection ( PSR ) in frequency domain of the proposed circuit is discussed .

基于机理与系统辩识法建模的电源噪声对无线电引信作用影响研究

Study of the Power Supply Noise Effection on Radio Fuze Based on Established Module of Mechanism and Systemic Identification Method

基于此模型，对低压降稳压器的电源噪声抑制进行了分析和研究，得到了低压降稳压器在频域的传递函数；

And the power supply rejection ( PSR ) of low dropout regulator is analyzed and studied based on this model .

采用线性稳压器为内部各模块提供工作电压，减小电源噪声的干扰。

Adopting a LDO linear regulator to power most of the internal circuit , the interference from the supply noise is reduced .

本电路的基本工作原理是将电源噪声直接添加到电路的反馈环节，帮助抑制电源噪声。

Essentially , the subtractor feeds the supply noise directly into the feedback loop of the bandgap circuit which could help to suppress supply noise .

文中介绍电源噪声滤波器的电路设计、测试方法及典型应用。

In this paper , It is proposed that the circuit design , test method and the typical application of a kind of power noise filter .

文中除了对芯片设计方法、思路及主要电路模块结构的设计方案进行讨论外，还提出了减小单片集成开关电源噪声的措施。

In addition to design methods and schematic of the main cell circuit modules , this paper also put forward measures of reducing switching noise on monolithic switching power IC .

电源噪声在深亚微米设计中正变得越来越突出，而因电源噪声引起的电路故障测试也变得越来越重要。

Power supply noise is more and more prominent during DSM ( Deep Sub-Micrometer ) circuit design , and testing of the faults caused by power supply noise is getting more important .

最后，分析和介绍了芯片中的部分子电路，包括：电源噪声隔离电路、基准电压源启动前的状态锁定电路、带频率抖动的振荡器和限流电路。

Finally , some of the sub circuits witch the author designed are analyzed . Including noises of power supply insulation , states latch circuit , oscillator with frequency jitter and current limiter .

本设计选择双积分型A/D转换芯片，并采用光电隔离装置，有效地降低了电源噪声和电机干扰，大大提高了转换精度。

The double integration A / D converter and the electro-optical isolation device are used to reduce the mains noise and motor interference , which can significantly improve the accuracy of A / D conversion .

介绍了开关电源噪声的类型，分析了开关电源噪声的产生原因，讨论了开关电源中噪声的抑制方法，介绍了几种抑制开关电源中噪声的实用电路。

This paper introduces the noise types of switching power supply , and analyses the generating reasons of noise in the switching power supply , discusses the suppression methods of noise , introduces several practical circuits to suppress the noise in switching power supply .

CMOSVLSI芯片中的电源总线噪声

Power Bus Noise in a CMOS VLSI Chip

SPWM逆变电源的噪声及抑制研究

The Study of the Noise and Restriction Methods of SPWM Inverter

本文介绍了CMOSVLSI芯片中电源总线噪声产生机理和对电路正常操作的影响。

This paper introduces the mechanism of power bus noise generation in a CMOS VLSI chip and the effect on normal circuit operation .