中断控制器

DSP中断控制器的实现

The research and design of interrupt controller in DSP

中断控制器硬件可以将中断发送到任何CPU。

The interrupt controller hardware sends interrupts to any CPU .

基于CPLD的中断控制器IP设计

IP Design of Interrupt Controller Based on CPLD

本文详细分析了内存控制器和中断控制器的总体功能以及内部各个模块的划分，介绍了一般IP设计流程。

This paper analyzes the whole functions and separate modules of memory controller and interrupt controller and introduces the normal IP design flow .

不同的SoC平台中，可能包含的模块各不相同。但是内存控制器和中断控制器是必不可少的。

Although different SoC platform will have different modules , there are some necessary modules , such as memory controller and interrupt controller .

由于软硬件的相关性，本文同时也对PC兼容体系的硬件资源有较多介绍，如可编程中断控制器、系统时钟、PCI总线及接口芯片，体现了嵌入式应用软硬件结合的突出特点。

Due to relations between hardware and software , this paper also introduces much knowledge about hardware resources of PC compatible system , such as programmable interrupt controller , system timer , PCI bus and related interface chip .

这个芯片是老的8259A可编程中断控制器的高级版本；

This chip is the advanced version of the old8259A Programmable Interrupt Controller ;

通过重置中断控制器8259A设置热键

Set Hot Key by Setting Interrupt Controler Again

而中断控制器作为此模块中的子模块，其性能的优劣直接影响到程序的效率和DSP的整体性能，本文以32位通用DSP为例，详细阐述中断控制器的硬件优化与实现。

Interrupt controller is its sub-module , which performance directly affect the effectiveness of program and the whole performance of DSP . This paper takes 32 bits generic DSP as an example , explain the hardware optimization and realization of interrupt controller .

由于8259A可编程中断控制器与单片机的信号不兼容，使它们之间的接口变得比较复杂。

Incompatability of programmable interrupt controller8259A with signals of computer on-slice causes the interface between them complicated .

根据数据通路所需要的控制信号，设计能使数据通路有效工作的控制通路；采用VHDL实现控制通路和中断控制器。

According to the control signal needed by the data access , control access that can make the data access well-functioned is designed ; VHDL is used to realize control access and break controller . 4 .

接口控制模块实现了UTOPIALevel2接口和中断控制器，并提供了控制板所需的多种控制信号。

The interface control module implements the Universal Test Operations PHY Interface ( UTOPIA ) Level 2 and the interrupts controller . It provides many kinds of control signals which the control board needs as well .

IRQ与向量之间的映射可以通过发出合适的I/O指令给中断控制器端口来修改。

As mentioned before , the mapping between IRQs and vectors can be modified by issuing suitable I / O instructions to the Interrupt Controller ports .

默认系统配置包括一组外围设备：一个中断控制器、一个16550兼容的UART、一个双PS/2设备控制器（处理鼠标和键盘端口），等等。

The default system configuration includes a bunch of peripherals : an interrupt controller , 16550-compatible UART , a dual PS / 2 device controller to handle the mouse and keyboard ports , and much more .

本文介绍了高级可编程中断控制器（APIC）系统的构成，并对其中的LocalAPIC模块、I/OAPIC模块以及A-PIC总线作了详细的介绍。

In this paper , the architecture of the Advanced Programmable Interrupt Controller ( APIC ) System is introduced , and the Local APIC module , I / O APIC module and APIC BUS are discussed in detail .

其内部主要由DMA控制器（82C37）、中断控制器（82C59）、可编程间隔计时器（82C54），DRAM刷新控制器，等待状态产生器，系统重置电路组成。

It is mainly composed of DMA controller ( 82C37 ), interrupt controller ( 82C59 ), programmable interval timers ( 82C54 ), DRAM refresh control , wait state generator and system reset logic .

对嵌入系统中断控制器的设计具有较好的指导作用。

It is helpful to the designer of the embedded system .

提高计算机管理主动性的有力保证&中断控制器

Enhance the Effective Guarantee for Computer Management Initiative & Interruption of Signal Controllers

该通信系统利用计算机中断控制器来实现。

By the interrupt processing of computer , the communication system is realized .

一种应用于嵌入式实时系统的中断控制器研究

Research on a Kind of Real-time Interrupt Controller

该文阐述了嵌入系统中断控制器高层次设计的设计思路和设计方法。

This paper proposes the method in high-level design of an embedded system interruption controller .

嵌入系统中断控制器的设计

Design of Interruption Controller in Embedded System

高级可编程中断控制器系统的研究

Research on Advanced Programmable Interrupt Controller Systems

微机中断控制器工作方式简析

Microcomputer Interrupt Controller Work Type Analyze

可编程中断控制器的仿真

Simulation of Programmable Interrupt Controller

中断控制器硬件需要确定中断源，以及应该接收该中断的分区。

The interrupt controller hardware needs to recognize the source of the interrupt and which partition should receive that interrupt .

其次，论文讨论了中断控制器和系统的内建测试功能的设计方案，并实现了其功能。

Secondly , this thesis discusses the design scheme of the interruption controller and built-in debug aides , and implements their functions .

辅助功能包括用于实时调试的调试单元，高分辨率嘀哒计数器，可编程中断控制器和电源管理。

Supplemental facilities include debug unit for real-time debugging , high resolution tick timer , programmable interrupt controller and power management support .

尤其是随着处理器向多核迈进，核与核之间的握手通信越来越复杂，中断控制器担当的任务也越来越重要。

Especially the development of the multi-core processors leads to the increasingly complex communication , and the interrupt controller plays an important role in communication of Microprocessor .

嵌入系统的设计者不再使用通用的中断控制器芯片，而是必须设计出适应于该嵌入系统需要的中断控制器模块。

In embedded system , system designers do not use a separate general-purpose chip as an inter-ruption controller chip any longer ; they must design an application-specific interruption controller as a part of system .