移位器

16位DSP处理器的移位器的研究

Study of the 16-bit DSPs ' Shifter

RPE包括MAC单元、ALU、移位器等主要功能部件。这些部件通过配置程序完成各种功能。

The major functional units consist of MAC , ALU , and Shifter etc.

一种DSP桶形移位器的设计与优化方法

Design and Optimization of a Barrel Shifter Unit for DSP

基于FPGA实现快速移位器的设计方案比较

The Schemes Comparison of Designing High-Speed Shifter in FPGA

文章对一种适用于分组密码算法的循环移位器IP核的设计进行了研究，该IP核的可重构设计使其具有可复用性。

A sort of reconfiguration cycling shifter for Block Cipher Algorithm , which was designed as IP core for reusing , was studied in this paper .

用PLD实现桶形移位器的功能

Realize the Barrel - shaped Shifter by PLD

提出了高速实现roundrobin调度策略的实现方法，并设计实现了桶式移位器和优先级编码电路；

Design and implementation of a fast Round Robin scheduler , in which a pipelined barrel shifter and a pipelined priority encoder are used ;

给出了一种仅用加法器和移位器实现的、适用于嵌入式fpga应用的，可重构的∑-Δ调制器设计。

In this paper , a scheme of re-configurable Sigma-Delta Modulator ( SDM ) only using adders and shifters is advised , which is suitable for embedded FPGA applications .

采用桶形移位器、基于PLA的并行解码算法等方法使得每个时钟周期解一个变长码码字。

The design uses barrel shifter and PLA-based parallel algorithm so that one variable length code can be decoded in every clock cycle .

最后，介绍了银河飞腾D4高性能DSP中的全定制设计模块桶形移位器与寄存器文件的视图产生过程。

Finally , the view-generating process of a full-customized barrel shifter module and register file module in a high performance DSP is presented .

设计实现了16位的SIMD加法器、混合40位加法器和漏斗移位器。

Design a 16-bit SIMD adder , a mixed 40-bit adder and a funnel shifter . 3 .

本文所设计的运算模块实现了桶式移位器、算术逻辑单元以及32位乘法器，支持ARM指令集中所有算术运算和逻辑运算。

The executing module designed by this article implements barrel shifter , arithmetic and logic unit ( ALU ) and 32-bit multiplier and supports all the logical and arithmetic operations of ARM instruction set .

重点讨论了其中的整数执行部件的设计，包括ALU、乘法器、桶式移位器、寄存器堆等重要执行部件。

It is given that the detailed design of the integer execution unit , include ALU , multiplier , barrel shifter and register files .

用从PLA中查出的码长来控制桶形移位器的位移，实现每个周期解出一个码字。

The PLA 's output code length controls the barrel shifter to eject the right number of bits from the bit stream , and one variable length code can be decoded in each clock cycle .

提出了一种新的基于Wallace树的分散式DCT/IDCT体系结构。它不依赖于ROM和乘法器，用面积开销低的加法器、移位器和4-2压缩器，实现了乘法密集的DCT/IDCT算法。

This paper proposes a Wallace-tree based new DCT / IDCT architecture , which does not depend on ROM and multipliers any more , but utilizes low cost adders , shifts and 4-2 compressors to implement the multiplication-dense DCT / IDCT algorithm .

桶式移位器的行为级模拟

Behavioral simulation for an barrel shifter of the partial decode

桶形移位器的设计采用了全译码电路结构。

Full-decoder circuit structure is used in Barrel Shifter design .

采用部分译码方式的桶式移位器，以其诸多优点，在芯片中得到广泛应用。

Partial decoding mode barrel shifter is adopted much more for its mer-its .

高速桶式移位器的设计研究

Design of a High-speed Barrel Shifter

着重研究了整数加法器、移位器、先导零预测逻辑等浮点加法器关键部件的优化设计。

Integer adder , shifter and LZA these key parts are mainly studied and optimally designed .

一种可配置的桶式移位器的设计

Design of a configurable barrel shifter

自动分频移位器药液自动配制分装机

Automatic frequency-dividing shifter The study and application of a device with automatically preparing and filling drug solution

桶式移位器通过比较全译码和部分译码两种实现方案，选择速度较快的全译码方式实现。

Through the comparison of two different methods , the barrel shifter is implemented with full-decoded method which is faster than part-decoded method .

详细介绍了膺架的设计、施工情况及利用移位器进行拖拉的安装技术；提出了几点技术保证措施。

Design and installation of the falsework and the shifter - dragging technique and the technical guarantee measures are introduced in detail in the paper .

多个器件可以通过一个接口串联连接，该接口无需外部电平移位器或隔离器，就可沿着电池组来回发送数据。

Multiple devices can be connected in series through an interface that sends data up and down the battery stack without external level shifters or isolators .

数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。

The digit signal processor embodies the center arithmetic logic unit , Multiplier unit , Shifter unit , Sequencing unit , Auxiliary register unit , interception unit .

变字长解码模块的核心是基于桶形移位器的并行解码结构，使用该结构的解码速度比一次一位的串行结构更快。

Parallel structured variable length decoder based on barrel shifter is designed which is faster than serial structured decoder . The serial structured decoder can decode one bit per cycle .

硬件结构主要包括总体时序控制单元、存储单元及其时序发生器、串并转换单元、移位器、选通器、运算单元和级联加法器。

The main structure of the hardware including top timing control unit , bram and its timing generator , serial to parallel converter , shift register , multiplexer , processing element and multi-level adders .

他说：“转换光学领域曾出现过各种有关光学设备的提议，如波束集中器、波束移位器以及可将来自多个方向的光集中于一点的超级天线等等。”

There have been proposals in the field of transformation optics for different devices like beam concentrators , beam shifters , super antennas which concentrate light into one point from all directions , and much , much more , he said .

结果宫内节育器移位以节育器下移最常见，临床表现以出血为主。

ResultsThe intrauterine device IUD downward shifted to the most common clinical manifestations were mainly bleeding .