指令周期

它的一个指令周期由四个时钟周期组成，任何一条指令（包括跳转指令）都只需要一个指令周期就能完成。

Its instruction cycle is made up of four clock cycles . Every instruction can be executed in one instruction cycle .

本设计的关键点为指令执行状态级的设计，每个指令周期包括8个机器时钟周期，由取指、译指、执指、RAM读、寄存器写、RAM写等组成；

The key of this design is the design of instructions state machine . Every instruction cycle includes 8 machine clock cycles , is made up of fetch instruction , decoder instruction , execute instruction , writing RAM , writing register and reading RAM etc.

更少的指令周期意味着CPU可以更多时间处于睡眠模式，从而进一步降低低功耗SiliconLabs器件的功耗。

Fewer instruction cycles means the CPU can spend more time in sleep mode , further reducing the already low power consumption of Silicon Labs'devices .

1MHz等于每秒一百万个指令周期。

One MHz equal one million instruction cycles per second .

此时间间隔的默认值为单个指令周期（10毫秒）。

The default value for this interval is a single clock tick ( 10 milliseconds ) .

与现有算法相比，新算法进一步减少了所需的指令周期。

Compared with existing algorithms , the new algorithm reduces the number of instruction cycles needed .

但是由于指令周期考虑不全和硬件自身的原因易引起定时误差。

Because instruction period is not completely considered and the hard ware is not perfect , it is easy to cause error .

一个指令周期需要44个时钟周期，速度较慢，所以只能进行基本的加、减、乘、除运算；本文提出并讨论了模加与模乘运算的逆运算&模减与模除运算。

Moreover , an instructor period contains 44-clocks period . Modulo subtraction and modulo division , the inverse operations of modulo addition and modulo multiplication , are proposed and discussed .

考虑到谐波电流指令的周期性，在a-b-c坐标系下引入重复控制策略，对三相进行独立控制，给出了重复控制器的设计思路。

Considering the periodical character of reference signal , repetitive controller is adopted in the a-b-c coordinates .

本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。

This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture , issuing multiple instructions in one machine cycle . Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed .

微处理器定点流水线控制器的设计实现，为提高流水线的运行速度，设计了基于指令执行周期的流水线控制器。

Design the fix point pipeline controller .

换句话说，软件中断常常在指令运行周期的开始。

In other words , software interrupts always occur at the beginning of an instruction execution cycle .

用单片机实现水声遥控指令的脉冲周期编码（PTC）信号

Make Pulse Time Code Signal of Underwater Acoustic Remote-Controlled Command by Using Single Board Computer

CPU将在紧跟着该指令的指令周期内执行一个空操作。被忽略的中断将继续等待，一直到GIE位再次被置位。

The CPU will execute a NOP in the cycle immediately following the instruction which clears the GIE bit .

提出了大多数指令在单周期内实现是RISC结构设计的新方法。

This paper proposes a new method of RISC architecture design , in which most of the instructions have been implemented by single machine cycle .

暂停（Stall）&处理器不开始执行新指令处的时钟周期。

Stall & A clock cycle where the processor does not begin a new instruction .

此项介绍在刷新前，激活指令需要的时钟周期。

This item specifies the number of clock cycles needed after a bank active command before a precharge can occur .

针对速度和面积两大性能指标，提出了一种基于可变执行周期的多周期乘法器结构，既保持了多周期乘法器的性能优势，又减少了乘法指令的平均执行周期。

Aiming at the two performance targets of speed and area , a structure of multi-cycle multiplier based on adjustable execution cycle is proposed , which not only keeps the performance advantages of multi-cycle multiplier , but also decreases average execution cycles . 5 .

图像跟踪器的硬件平台以先进的DSP技术（ADSP-TS201）和可编程逻辑器件（Stratix系列的EP1S40F1020芯片）为核心，构成实时的图像跟踪处理器，使得指令可在单指令周期内完成运算。

As the core of image tracker , the advanced DSP technology ( ADSP-TS201 ) and the programmable logic device ( EP1S40F1020 chip ) were combined together to make certain that instruction was completed within single instruction period .

在编译前端的基础上，考虑目标机的指令系统、寻址方式和指令周期，采用回填技术对机器码填充数据以生成等价有效的目标代码&汇编语言程序。

At the base of compiler forepart , considering repertoire , addressing mode and instruction period of object machine , adopting backfill to fill data for machine code in order to generate right object code , assemble language program .

提出基于指令类型动态分配的译码器设计方案和基于指令执行周期的动态逻辑发射方案。

Propose the run time dispatched instruction decoder and issue logic based on instruction execution cycle .

在单指令流单数据流结构中，有单一的指令周期，在执行前，单个处理机按序取操作数。

In an SISD architecture there is a single instruction cycle ; operands are fetched serially into a single processing unit before execution .

因此，在机器指令具有多重操作码，且允许在一个微指令周期中实现其全部功能等场合下，两级地址编码的方法可作为实现全面微程序控制的一种可取的方法。

Therefore , the double level address-encoding may be considered as a possible technique for implementing the microprogramming completely , provided that the machine code is available with multiple operation parts and the execution of all their functions can be accomplished within one microcode period .