平面晶体管

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  • planar transistor
平面晶体管平面晶体管
  1. 采用该技术可消除绝大多数平面晶体管管芯的低击穿和穿通点,从而大幅度提高管芯、特别是大功率管管芯的合格率和高档品率。

    By use of the method , the low-breakdown and breakover position of great majority plane transistor core can be eliminated to increase the qualification rate of the tube core , especially the powerful transistor .

  2. IBM以及其它部分厂商目前则在使用基于部分耗尽型SOI技术的平面型晶体管制造自己的处理器产品。

    AMD , IBM and others are also using another type of SOI technology-partially depleted SOI-for their respective processors .

  3. 随着集成电路中器件密度的增加,传统平面MOS晶体管(MOSFET)的功耗问题变得更加突出。

    With the increasing of device density in the integrated circuit , the issues of the power dissipation in the conventional planar metal oxide semiconductor field effect transistor ( MOSFET ) become more prominent .

  4. SIPOS钝化的平面功率晶体管采用半绝缘掺氧多晶硅和二氧化硅的多层表面钝化技术。

    Power transistor with SIPOS passivation layer uses multilayer surface passivation technology which are Semi-Insulating oxygen-doped Polycrystalline-Silicon and SiO2 passivation layers .

  5. 作为芯片业的另一代表,绝缘硅(SOI)产业联盟,其成员包括美国企业Globalfoundries和英国企业ARM,正在致力于升级平面型晶体管。

    As an alternative the Silicon On Insulator ( SOI ) consortium , which includes Globalfoundries , an American firm , and ARM , a British one , is trying to improve flat transistors .

  6. 晶体管之间的电气参数变差也更小,因此相比平面型晶体管可以使用更低功率的电源,VCC电压也更低。

    They are less sensitive to mismatches , thus allowing a more aggressive scaling of the power supply and a lower VCC than planar arrays .

  7. 另一个电路,通过两个普通硅外延平面开关晶体管在雪崩区的串联运用,很容易得到输出脉冲幅度大于60V、上升时间短于ins的大幅度近似阶跃脉冲。

    The other circuit , by connecting two normal sillcon epitaxial planar transistors operated in avalanche mode in series , can easily achieve large-amplitude step like pulses with amplitude more than 60V into 50 Ω load and rise time less than Ins .

  8. 目前制造晶体管的主流技术是采用体硅技术制作的32/28nm制程平面型晶体管。

    At present , leading-edge chip makers are using conventional bulk CMOS and planar transistor structures for the32 - / 28-nm nodes .

  9. 平面外延光电晶体管平面钢管桁架平面外稳定混合有限元分析

    Analysis of Out-of-plane Stability for Planar Tubular Truss with Mixed Finite Elements Method

  10. 平面栅静电感应晶体管阻断状态解析模型

    Analytical Model of the Blocking State of Surface Gate Static Induction Transistor

  11. InGaAsP/InP准平面异质结双极晶体管及其与光器件的集成

    Quasi-Planar InGaAsP / InP Heterojunction Bipolar Transistor and Its Intergration with Optoelectronic Devices