缓冲器

huǎn chōng qì
  • buffer;bumper;dead block;antifluctuator
缓冲器缓冲器
缓冲器[huǎn chōng qì]
  1. 基于MATLAB的液气缓冲器调车冲击特性分析

    Analysis on Dynamic Characteristics of the Hydropneumatic Buffer Based on MATLAB

  2. 基于解码缓冲器复用及PC越级传输的循环加速方法研究。

    Loop accelerating scheme based on reuse of decode buffer and PC transmission across pipelines .

  3. EAST中性束注入器打火保护的缓冲器设计

    Snubber Design for Breakdown Protection of Neutral Beam Injector of EAST

  4. 基于CCD传感器的缓冲器自由高度自动检测仪

    The Free-height Autoanalyzer of Bumper Based on CCD Sensor

  5. 使用变比例到定比例的方法优化CMOS串联缓冲器链的设计

    Optimization of CMOS Tapered Buffer Using Variable to Fixed Ratio Method

  6. 用于分析电磁散射的多层Z缓冲器技术

    Multiplaten Z - Buffer Technique for Analysis of Electromagnetic Scattering

  7. ST型缓冲器技术参数的确定

    Determination of Technical Parameters for ST Type Draft Gears

  8. 此方法对于大功率RC阻容缓冲器设计具有一定的指导意义。

    This method for high-power RC snubber design has a certain significance .

  9. 队列管理的设计是共享缓冲器ATM交换结构设计的关键,该文具体研究了共享缓冲器交换结构的队列管理,提出了循环队列管理,它能有效地实现共享缓冲器ATM交换列表操作。

    Design of queue management is key in shared buffer ATM switch architecture .

  10. ST货车缓冲器弹簧的断裂分析

    Fracture Analysis of ST Draft Gear Spring

  11. 双等比CMOS缓冲器的设计

    Design of Dual Fix Tapered CMOS Buffer

  12. CMOS缓冲器的时延估算模型

    A Predictive Delay Model for CMOS Buffers

  13. ST型缓冲器拉紧螺栓折断和螺母脱落故障分析

    Analysis of Breaking of the Drag Bolts and Falling Off of the Nuts on ST Draft Gears

  14. 用于单电源ADC的直流耦合单端到差分缓冲器

    DC Coupled Single-Ended to Differential Buffer for Single-Supply ADCs

  15. ANSYS软件的二次开发及其在大容量缓冲器模锻件上的应用

    Secondary development of the software ANSYS and its application to die forgings for heavy - duty draft gears

  16. 客户端与共享服务器采用远端帧缓冲器(RemoteFrameBuffer,RFB)协议来传输数据。

    Client and shared server use a remote frame buffer ( RFB ) protocol to transmit data .

  17. DMA首先装满行缓冲器。

    The DMA will first fill the line buffer .

  18. 带有缓冲器串行生产线的Harris链结构分析

    The structure analysis of the tandem production line with buffers using Harris Markov chain

  19. 基于VHDL的循环缓冲器设计

    The Design of the VHDL-Based Circle Buffer

  20. 针对该芯片的架构,提出了缓冲器管理单元的设计方案,并应用Verilog语言完成了该单元的RTL级设计。

    The RTL design of the module is completed using Verilog .

  21. 数据集太大了,无法放入Informix内存缓冲器中。

    The data set was too large to fit into Informix 's memory buffers .

  22. 针对使用拼接单元块设计方法的岛式FPGA,介绍了一种交叉连接的方法,可以为其全局信号网络的缓冲器插入提供可变性。

    We present a staggered buffer connection method that provides flexibility for buffer insertion while designing global signal networks using the tile-based FPGA design methodology .

  23. 一旦行缓冲器1接通,DMA将迅速地重新装满行缓冲器2。

    As soon as line buffer 1 is switched on , then the DMA will quickly refill line buffer 2 .

  24. 基于IBIS模型的高速数字I/O缓冲器的瞬态行为建模

    Transient Behavioral Modeling of High-Speed Digital I / O Buffer Based on IBIS Model

  25. 通过记录缓冲器和对存储体的改造,RBC能够过滤大部分不必要的存储体访问,有效地降低了Cache的功耗。

    With the record buffer and the modification on data array , RBC can filter most of the unnecessary cache activities , thus reducing energy consumption significantly .

  26. 采用后向面判别法和深度缓冲器算法分析面元之间的遮挡关系,计算了整个高超声速飞行器的RCS。

    To compute RCS of whole HCV , the shadowing relationship of facet analyzed by the method of backward surface identification and depth-buffer is considered .

  27. 系统的智能采集卡自带CPU和FIFO缓冲器,插于工控机ISA扩展槽。

    The intelligent data acquisition card of this system with its own CPU and FIFO RAM is inserted in ISA bus of industrial control computer .

  28. 在三个接收缓冲器中,MAB的作用总是接收来自总线的下一条信息。

    Of the three receive buffers , the MAB is always committed to receiving the next message from the bus .

  29. 就信元丢失率、吞吐量和存储器利用率来说,共享缓冲器式ATM交换机是实现B-ISDN的最佳选择。

    In terms of the cell loss rate , throughput , and utilization of buffer size , the shared buffer ATM switch is the best choice to implement the B-ISDN .

  30. 对OBS利用偏移时间和延迟预约来避免使用缓冲器的方法和性能,及其在WDM层所能提供的服务质量进行了分析研究。

    Analyzing how offset times and delayed reservation can help avoid the use of buffer , and supporting quality of service at the WDM layer .