多核处理器

面向多核处理器的Linux网络报文缓冲区重用机制研究

Research on Linux network packet buffer recycling toward multi-core processor

基于指令Cache作废的多核处理器同步技术

Synchronization technology based on invalidation of instruction Cache for multi-core processor

以异构多核处理器Cell为实例，基于分布式存储模型为Cell处理器设计并实现了一个源到源编译器。

Based on the distributed memory model , a source-to-source compiler is designed for a heterogeneous multi-core Cell .

多核处理器模式下的USB无线网卡驱动实现

USB Wireless Network Card Driver Implementation Based on Multicore Processor Model

基于共享cache多核处理器的数据库内存排序优化

Database Internal Sorting Optimization Based on Shared Cache Chip Multi-Processor

浅析多核处理器条件下的Java编程基于龙芯处理器的二进制翻译器优化

Analysis on Java Program Based on Multi-Core Processor CPU Optimization of Binary Translator Based on GODSON CPU

多核处理器Cache一致性协议关键技术研究

Key Techniques of Cache Coherence Protocol for Multi-Core Processor

本课题主要研究如何使Linux操作系统对Intel多核处理器进行更好的支持。

This paper mainly research how to make the Linux operating system support Intel multi-core processors better .

可视化开发环境以开发、分析和模拟目标为多核处理器和Android平台的程序

Visual development environment to develop , analyze and simulate applications that target multicore processors and the Android platform

AMD向异构多核处理器迈出第一步

AMD Take the First Step Toward Heterogeneous Multicore Processors

如果您的机器运行不止一个处理器或者多核处理器，您可能需要使用-j选项来make，使其同时运行多个编译任务，因而加快进程速度。

If your computer has more than one processor or a multi-core processor , you may want to use the-j option to make to have it run multiple compile jobs simultaneously , thus speeding up the process .

设计并实现了一种基于多核处理器的并行数据重组系统，测试了CPU亲和力设置对并行重组系统性能造成的影响。

Parallel data reorganization system based on multi-core processors is designed . And we tested the influence of CPU affinity setting . 3 .

比较了不同共享级别条件下多核处理器的性能，确定了在二级Cache级别进行共享。

Multicore processor performances with different memory sharing levels are compared which help to determine to share the memory at the L2 cache level .

最后，完成了NoC多核处理器原型验证平台的FPGA开发板方案设计实现。

Finally , the paper completed the design of the development board based on the NoC multi-core FPGA prototype processors .

对多核处理器来说，调试工具的主流仍是JTAG技术。

JTAG technology is still the leading debug tool for Multi-core processor .

开级配大粒径沥青碎石混合料沥青路面温度应力影响因素分析一种面向多核处理器粗粒度的应用级Cache划分方法

Analysis of Influence Factors of Temperature Stress of Open-graded Large Stone Asphalt Mixture in Asphalt Pavement A Coarse-Grand Cache Partitioning Technique for Multi-Programmed Workloads on CMPs

粗颗粒高品级人造金刚石合成工艺研究及在地质工程中的应用一种面向多核处理器粗粒度的应用级Cache划分方法

The Study of the Technology of Synthesizing Big Particle and High-grade Diamond and Its Application ; A Coarse-Grand Cache Partitioning Technique for Multi-Programmed Workloads on CMPs

当今的CPU速度已经达到数GHz，出现了多核处理器和数GB的内存，即使在这样的时代，程序性能问题仍然受到持续的关注。

Program performance , even in the age of multigigahertz / multicore processors and multigigabytes of RAM , remains a perennial concern .

特别是人们把Erlang看作是多核处理器下的一种自然编程语言。

In particular Erlang is thought to be a natural programming language for multicore processors .

Codezero还专门针对嵌入式系统设计，支持多核处理器和基于ARM的设计。

Codezero was also designed specifically for embedded systems and supports multicore processors as well as ARM-based designs .

实验结果表明，SVM具有较好的扩展性，在具有不同系统配置的多核处理器上达到了接近线性的加速比，并保持了较高的负载均衡率和较低的通信开销。

Experimental results demonstrate that the SVM is scalable with processor cores and nearly reaches linear speedup on processors while keeping high load balance efficiency and low communication overhead .

C、C++和Fortran等基于单指令流和统一存储结构的传统编程模型已经无法适应多核处理器结构。

Traditional programming model like C , C + + and Fortran are poorly suited to multi-core architectures because of the assumed single instruction stream execution model and centralized memory structure .

利用FPGA应用的灵活性和良好的并行处理能力，针对不同的开发板分别研究了在其中嵌入单核、双核及多核处理器的实现过程及资源耗用情况。

FPGA has good characteristics of flexibility and parallel processing capability . For different FPGA development board , different realization methods , including single , double processor or multiprocessor , are embedded into it .

在这种情况下，片上多核处理器CMP（Chipmulti-Processor）随之诞生，它将多个处理器内核集成在一个处理器芯片上以此来提高计算能力。

In this case , the Chip Multi-Processor ( CMP ) comes into being . It integrates more computing cores on one processor chip to increase computing power .

实验结果证明，将目录信息存储在本文中提出的L2Cache中并对基于目录的Cache一致性协议改进后，减少了多核处理器的访存延迟，提升了系统性能。

Experimental results show that the directory information was stored in the paper presented in the L2 Cache and directory-based cache coherence protocol improved , reducing the multi-core processors fetch latency , improves system performance .

Intel即将推出的Larrabee图形芯片将会为这一市场提供解决，同时还有标配的多核处理器。

Intel 's upcoming Larrabee graphics chip will address this market , in addition to standard multicore processors .

基于领域的数据流编程（DataflowProgramming）模型将媒体应用特性与程序设计语言相结合，在简化编程的同时，为编译器在多核处理器下的优化提供了大量的并行性，因此受到广泛的关注。

Domain specific programming like Dataflow Programming Model combines the features of media applications and programming languages to simplify programming and provide the compiler a lot of parallelism optimization for multi-core processor .

如果建筑物设计图非常大或者需要映射非常大量的数据点，则有可能需要使用最新的多核处理器和几个GB的内存。

If your building blueprint graphic is very large or you intend to map an enormous quantity of data points , you may require the latest multicore processor and several gigabytes of RAM .

在典型的多核处理器（CMP，Chipmulti-Processor）体系结构中，多个处理器核共享二级高速缓存，这种方式不仅能够提高高速缓存的利用率，还能避免存储器硬件资源的浪费。

A typical CMP ( Chip Multi-Processor ) architecture often has a shared L2 cache and lower storage hierarchy . Sharing the L2 cache allows high cache utilization and avoids duplicating cache hardware resources .

本文在研究和综合分析了目前流行的几种多核处理器间的通信方案后，采用了基于Mutex互斥核与共享资源的通信方案。

This paper does research and analysis of several popular communication schemes between multiprocessors , and cheese the communication based on the Mutex exclusive nuclear and sharing of resources .