加密芯片

这种程序可在一种处理器芯片上得到，该芯片称为加密芯片，通常也称为密钥托管芯片。

This program is available on a processor chip called the clipper chip and is also known as the key escrow chip .

加密芯片中密钥获取模块的设计与FPGA实现

Design and FPGA Implementation of Key Acquisition Module in Encryption Chip

采用RSA算法的加密芯片设计

Design of the Safety Chip Based on RSA Encryption Arithmetic

一种基于RSA算法的加密芯片设计

Design for an IC Based on RSA Encryption Algorithm

Hopfield神经网络模块可应用到加密芯片上，模拟非线性函数控制伪随机序列的输出。

The Hopfield neural network module can be applied to cipher chip , which simulates nonlinear function for controlling the output of pseudo-random stream .

介绍了AES算法的硬件加密芯片优化设计，并讨论了AES算法加密芯片在射频IC卡等效实现金融CUP卡规范中的应用。

This paper introduces the hardware optimization design of AES encryption chip , and discusses the application of AES encryption chip when radio frequency card equivalent realization finance CPU card standard .

基于AES-128的加密芯片的设计方法

Design Method of Encryption Chip Based on AES-128 Encryption Algorithm

为了保证加密芯片中加密密钥的获取安全，提出了一种基于CPU卡的密钥获取模块的设计方案，并用FPGA进行了实现。

In order to satisfy the acquisition security requirement of the encryption key in the encryption chip , a design method of the key acquisition module based on CPU smart card is presented , and implemented in FPGA .

按此设想，本文给出了一种基于微处理器的科学、经济、快速的ASIC芯片功能验证方案，并成功设计出用于某通信设备中的专用加密芯片。

So this paper introduces a scientific , economic and fast method for ASIC chip verification based on microprocessor . and successfully design a special encryption chip using in a communication device .

一种改进二次背包算法的加密芯片设计

The Design of Enciphering Chip Based on an Improving Matrix Coverage Algorithm

这种设计占用资源少，适合对速度要求不高的低端加密芯片。

This design takes fewer resources and is suitable for low-end security chip .

适用于可编程加密芯片的可重组体系结构

The Reorganizable Architecture for Programmable Encryption Chip

一种加密芯片的实现和应用

Implementation and application of a cipher chip

提出了一种适用于可编程加密芯片的可重组体系结构。

A kind of reorganizable architecture for programmable encryption chip has been proposed in this paper .

最后给出了该硬件加密芯片在射频卡等效实现金融卡规范实例中的应用模型。

Finally design the application model of this hardware encryption chip in radio frequency card equivalent realization finance card standard .

抗功耗攻击快速椭圆曲线加密芯片的研究实现双λ/4波片复合效应与椭圆偏振光的实验验证

A Research and Implementation on Fast ECC Chip Resistant against Side Channel Attacks Detecting elliptically polarized light using compound quarter-wave plate

文章基于目前公钥密码加密芯片加密速度慢的缺点提出了一种新的方案，即根据一种改进的二次背包算法设计加密芯片。

Because of the previous slowly enciphering of enciphering chip , we present a new method to accelerate enciphering , which designs chip based on an improving Matrix Coverage algorithm .

现提出基于神经网络算法的序列密码加密芯片设计，在保留原序列良好统计特性基础上，使输出序列的周期性和线性复杂性均有增加。

Now we bring in a stream cipher encryption chip design which is based on neural network algorithm and it not only contains the good statistics of m-sequence but also enhances the periodicity and linear complexity of the output sequences .

应用于USBKEY的加密安全芯片是解决证书载体的关键。

The encryption security chip applied to the USB Key is a good carrier of digital certificate .

逻辑加密存储芯片在智能卡加油机中的应用

Application of the Logic Crypto Memory in the Gas Machine of Intelligent Card

基于流密码的非接触逻辑加密IC卡芯片设计

The Chip Design of Contactless IC Card with Log ic al Cipher Base on Stream Cipher

加密安全芯片能够内部生成公私密钥对和导入并存储数字证书，利用芯片内部的密码算法认证用户身份。

The encryption security chip can generate public and private keys , import digital certificate and make identity authentication .

本文目标是设计并实现一款密码运算全面、性能优秀、低成本的的加密安全芯片。

The destination of this thesis is to design and implement a encryption security chip which has comprehensive cryptographic algorithm , excellent performance and low-cost .

对AES密码算法的结构进行了优化，并应用0.6μMCMOS工艺实现了AES加密/解密芯片。

This paper presents an architecture optimization for AES ( Advanced Encryption Standard ) algorithm , and a chip implementation using 0.6 μ m CMOS technology .

然后，讨论了加密协处理器芯片的电路设计和仿真、验证问题。

Finally , circuit design , physical design , simulation and validation of the encryption coprocessor chip are presented .

公布这一发现的一位专家表示，使用全磁盘加密和高通芯片的手机是最危险的。

The finding comes from an expert who says that phones running full disk encryption ( FDE ) and Qualcomm chips are most at risk .

在功能分配上，将计算量较大的加密算法利用蓝牙芯片内部的DSP处理器实现。

In the Bluetooth firmware , the computation-intensive cryptographic algorithm is implemented by using DSP on Bluetooth chip .

本课题的工作主要是对基于AES加密算法的加密芯片进行研究和设计实现。

This thesis is focus on the design of AES algorithm security chip .

差分功率分析（DPA）方法可有效地对加密的集成电路芯片进行攻击解密，它绕过了加解密算法繁琐的数学分析，从而获取密码和信息。

The method of DPA may attack on encrypted FPGA effectively , which does not need complex analysis to encryption arithmetic and obtains ciphertext and information .

跳频加密算法研究及芯片实现

Theoretical Research and ASIC Realization of Frequency Hopping Encrypt Algorithm