众核处理器

在另一个实施例中，具有多个VR的功率管理系统可以在与众核处理器的管芯分离的管芯上。

In another embodiment , the power management system with multiple VRs may be on a die ( 'the VR die ' ) separate from the die of the many-core processor .

分片式处理器体系结构（TPA）能够很好地应对纳米工艺代的功耗、线延迟、设计和验证复杂度等一系列问题，是一种具有良好的性能扩展潜力的众核处理器体系结构设计方案。

Tiled Processor Architecture ( TPA ), as a many-core architecture design with good scalability , can cope well with challenges such as power consumption , wire delay , design and verification complexity in nano technology .

随着微处理器体系结构技术的发展，众核处理器已经成为未来微处理器的一个重要发展方向。

With the development of CPU , many-core architecture is the keypoint of the future development .

本文的主要工作包括：1.提出使用算法骨架进行众核处理器编程的思路，以提高众核处理器可编程性和代码可移植性。

The contributions of this work include : 1 . Proposing the use of algorithmic skeletons for many-core processors to solve the prob-lem of programmability and portability .

半导体工艺的持续进步和流编程模型的提出是推动众核流处理器体系结构向前发展的两个重要因素。

The development of stream processor architecture is mainly driven by semiconductor technology and stream programming model .