并行方式

Flow活动是一组以并行方式运行的活动，而Sequence是一组以串行方式运行的活动。

A Flow activity is a group of activities that run in parallel , and a Sequence activity is a group of activities that run in sequence .

ANN以并行方式处理信息，运行速度快；以分布方式存储信息，容错性好。

ANN approach to parallel processing of information , fast ; to the distribution of stored information , a good fault tolerance .

人工神经网络（ANN：Artificialneuralnetwork）是一种信号处理系统，它是由许多的具有非线性计算能力的计算单元模仿生物神经系统神经元的连接方式连接而成，以并行方式运作。

Artificial Neural Network ( ANN ) is a information processing system which is composed of a number of nonlinear computational elements which operate in parallel and are arranged in a manner reminiscent of biological neural interconnection .

网络并行方式的PVM异构计算环境

PVM Heterogeneous Computing Environment for Networked Parallel Computing

C2的值更高密度的并行方式继续循环。

C1 , which continue to cycle in a manner parallel to the C2 value higher density .

GIG的目标是在以网络为中心的环境中获得信息优势，使各种系统和基于消息传递的Web服务能够以并行方式进行互操作。

The GIG aims to achieve information superiority in a network-centric environment by enabling various systems and messaging-based Web services to interoperate with each other in parallel .

它采用并行方式连接系统内的所有主从设备，无需CPU参与即可在外设和片内片外存储器间传输数据。

It connects all masters and slaves in the system in a parallel fashion and enables data transfers between peripherals and on-and off-chip memories without any CPU intervention .

MapReduce程序用于以并行方式计算大量数据。

MapReduce programs are designed to compute large volumes of data in a parallel fashion .

FPGA能以并行方式工作，故基于FPGA技术的振动控制器能够以并行的方式实现信号处理的功能，将极大的提高系统的工作效率。

FPGA can work with parallel mode , so the vibration controller based on FPGA technology can implement signal process function with parallel mode , which will deeply improve the work efficiency .

采用了并行方式连接3个CCD像机和3块图像采集卡，这样图像数据流通过PCI总线实时传输给PC，保证实时采集。

We also use parallel connection among three CCD cameras and three pieces of image collection clip , then the data stream transmit PC by the PCI bus , ensure real-time collection .

结合二者的优点，采用并行方式形成CMAC-PID控制器，进行了Matlab仿真实验。

Combining both of these advantages , the CMAC-PID controller is designed using the parallel mode and the Matlab simulation experiments are done .

本文还研究了GPU（图形处理器），并提出了以GPU并行方式来提高算法效率的改进方案。

This paper also studied the GPU ( graphics processor unit ), and proposed an improved scheme in parallel GPU to improve the efficiency of the algorithm .

在“UnOrdered”方法中，事件将以并行方式交付，并且无法保证事件序列。

In the " UnOrdered " method , events are being delivered in a parallel way and the events ' sequence is not assured .

该监控系统利用双口RAM作为共享的数据缓冲区，实现实时数据的同步交换。系统以同步并行方式工作，确保了监控的实时性。

Using dual port RAM as shared data buffer to implement synchronous exchange of real-time data , this supervisory control system operates in synchronous parallel mode , so real-time performance of this system can be ensured .

该项目把仿真器在EPCC的TMCCM-200计算机上以数据并行方式进行了实施。

It was implemented in a data-parallel form on EPCC 's TMC CM-200 .

针对数据包级别并行方式的特点，本文对PCB队列的锁粒度进行了改进，并使用MS-queue算法改进PCB下的任务队列。

In data packet level parallelization , we improve the lock granularity of PCB-queue . Eliminate the lock operation in task queue of PCB by MS-queue algorithm .

由于本系统采用多处理器并行方式，采用当今先进的ARM／DSP双核芯片做主处理器，并且针对系统特点进行了优化，从而保证了系统在控制方面具有很大的优越性。

Because of adopting the multiprocessor parallel design , adopting the current advanced chip ( ARM / DSP dual kernel chip ) as the main processor , and aimed at the characters , optimizing the control system , guarantee the advantage of the control system .

一种是基于最小线性误差的PIC算法，该算法先通过最小线性误差方法估计误差，然后通过并行方式统一将各个载波的频率影响消除。

One is a PIC algorithm based on minimum linear error . It estimates error using the minimum linear error method , and then eliminates the influence of the all carrier frequencies in a parallel way .

然后采用TDMA时分多路复用技术对全网进行统一的时隙划分，其中簇内时隙划分采用并行方式，簇间时隙划分采用串行方式。

Then it takes the whole network into a unified slot by adopting TDMA time-division multiplexing technology , in which slots in cluster are applied to a parallel mode and slots between clusters are applied to a serial mode .

在“OrderedByKey”方法中，事件在一些特殊情况中也会采用并行方式交付。

In the " OrderedByKey " method , events are also being delivered in a parallel way in a special situation .

为充分利用Spartan-II芯片的硬件资源，编译码器采用了流水线方式与并行方式，并提高了系统时钟频率。

The design makes the most of hardware resource Spartan-II chip , and adopts pipeline and parallel mode in order to improve the system clock and decode speed .

接收模块在内部有限状态机的控制下能够从串行输入的比特流中检测到一个字符帧的开始和结束，并提取8bits数据以并行方式输出。

Receiver module uses another finite state machine to detect start and end of character frame from the serial bit stream , it also extracts 8 bits parallel data from the bit stream as output .

硬件与计算机间通讯采用双向并行方式。

It adopts parallel bidirectional communication between hardware and computer .

因此，以并行方式进行审阅将带来很多好处。

Therefore , it would be beneficial to execute the reviews in parallel .

但是，不同分组中的事件将采用并行方式交付。

But , events in different group are being delivered in a parallel way .

两个或多个活动（程或程序）并行方式进行。

The progressing of two or more activities ( processes , programs ) in parallel .

移位寄存器是一种能以串行和并行方式输入信息的装置。

The shift register is a device in which information may enter sequentially or in parallel .

有关以并行方式大容量加载的详细信息，请参阅优化大容量导入指南。

For more information about bulk loading in parallel , see guidelines for optimizing bulk import .

将要以并行方式执行的该部分业务逻辑放在该事件处理程序内部。

Place that part of the business logic that is to be processed in parallel inside that event handler .

问题通常不能以并行方式进行解决，因为解决问题可能会导致事务有效负载的变化。

Issues cannot generally be resolved in parallel , as the resolution may result in a change to the transaction payload .