外部总线

因为这种IDE接口如果要对硬盘进行读写，需要操作系统、驱动程序、计算机外部总线以及接口控制器共同工作。

Because if the IDE interface reads and writes the hard disk , it needs operating system , driver , external bus and interface controller to work together .

总线技术，特别是外部总线技术在装备自动测试系统（ATS）中占有十分重要的地位，是构成装备自动测试系统的桥梁与纽带。

The bus technologies , especially the external bus technologies take a very important part in the instrument ATS , and are also considered as the bridge and tache of the ATS .

Foreignbusname：TheForeignBus（它是我们在上一步中创建的，将可能是仅有的一个外部总线名称）

Foreign bus name : TheForeignBus ( which we created in the last step , and will probably be the only one )

它是把使用USB的外围设备连接到主板的一种外部总线结构。

It is a kind of outer bus structure which is used to connect the peripheral devices and main boards .

作为一种外部总线，USB提供设备与系统主机的通信接口，USB主机管理各类USB设备及USB传输，调度器的设计是USB主机控制器驱动的主要部分。

USB provides the interface for system host and USB devices . The USB host is dedicated to managing all USB device and transfer of the system .

串行通信接口是目前使用最多的一种外部总线，大多数GPS用户接收机通常都提供一个符合RS-232C电气标准的数据接口，与各种处理器平台进行数据交换。

Most of GPS receiver has a data interface based RS-232C electrical standard , which can exchange data with all processor platform .

外部总线是位于当前SIBus的外部的总线；它可以是另一个SIBus或MQ队列管理器。

A foreign bus is one that is external to the current SIBus ; it can be another SIBus or an MQ Queue Manager .

通过外部总线口扩展外部存储器和接口是构成ADSP2106X应用系统时最基本、最重要的设计。

Its the fundamental and foremost design for constituting an ADSP2106X application system to expand external memories and interfaces by the external bus port of ADSP2106X .

通过对PowerPC结构的总线协议的分析，总线接口部分主要由指令预处理部分、地址总线处理部分、数据总线处理部分和数据后处理部分组成，完成微处理器和外部总线的数据交互。

It will become the basis of Shared Bus . Though the analysis about the PowerPC Bus , there are four parts in BIU : Instruction Pretreatment Part , Address Bus Treatment Part , Data Bus Treatment Part and Data Pos-treatment Part .

该采集系统包括下列模块：电源模块、复位电路、晶体振荡器电路、外部总线扩展接口、JTAG接口、外部EEPROM接口、模拟信号采集模块、异步串行接口模块、D／A输出模块等。

The data acquisition system includes many modules such as power supply module , reposition module , external EEPROM module , crystal oscillator module , external data bus expending interface , JTAG interface , analog signals acquisition module , asynchronous serial communication interface , D / A output module , etc.

为了完成此工作，必须配置一个外部总线。

To do this , a foreign bus must be configured .

外部总线采用二总线结构；

Double-bus architecture is adopted in external bus architecture design .

在试验与测试一体化平台中，外部总线是重要的组成部分之一。

External Bus is one of the important parts in the test of integration platform .

完美的外部总线

THE PERFECT Peripheral Bus

别名目的地，可以配置为引用另一个目的地（可能位于外部总线上）的目的地。

Alias destinations are destinations that can be configured to refer to another destination , potentially on a foreign bus .

该系统主要包括三个部分：第一部分是外部总线以及对高频信号的采集与处理，它主要解决了系统与外部测试仪器的通讯，借助示波器实现了高频信号的采集；

The system includes three parts : ( 1 ), exterior bus and high frequency signal data acquisition and signal processing ;

不过在安全总线中，外部总线是在缺省情况下不允许访问的资源。

Foreign buses , however , are a resource to which access is not allowed by default within a secure bus .

并分析了系统的启动过程与处理器的工作模式及功能管理、外部总线接口、存储器的分配与管理等内容；

And then , make analysis of system startup , processor running mode , externed BUS interface , memory configuration and management .

在服务集成总线上定义外部总线实际上是在体系结构级定义两个总线之间的链接。

Defining a foreign bus on a service integration bus simply defines a link between the two buses at an architectural level .

由于外部总线数据传输速率远低于处理器内部总线，数据传输的通信成本将大大降低密码服务效率。

For the speed of data transmission on external bus is quite lower than on internal bus of microprocessor , the communication cost of data transmission would greatly play down cryptographic service efficiency .

其中，主体电路设计部分包括了系统启动与复位、内存分配与管理、中断响应与处理、外部总线接口、时钟与电源管理、系统开发与调试功能等内容；

The design of main circuit includes system startup and reset , memory assignment and management , interrupt response and management , external bus interface , clock and power control , system development and debugging function .

该系统不仅可以对主电源进行实时监测，还可以在主电源掉电的情况下自动切换至备用电源；同时，禁止外部总线对时钟内部寄存器的访问，以保存数据的完整性。

This system can supervise the main power and switch the backup power ( battery ) to the RTC when main supply is off ; at the same time , the access from the bus to internal registers is stoped to prevent the timing data .

为了便于获取指令，处理器把需要的由二元数据构成的地址存储在外部处理机总线的序列里面。

To carry out a fetch , the processor places the binary-code address of the desired location onto the address lines of the external processor bus .

简单介绍巧用51单片机的外部系统总线，进行特殊的外部扩展连接，并给出相应的实现程序。

Briefly introduce that use the outside system bus skillfully to connect the MCS51 to peripheral devices specially and then show the relevant program to realize it .

本文其余部分将向您展示一个使用WebSphereMQ作为外部消息传递总线的高可用BusinessEvents基础设施。

The rest of this article will show a highly available Business Events infrastructure using WebSphere MQ as the external messaging bus .

高性能微机EISA总线和外部设备SCSI总线之间设置主适配器，可使系统与外设的数据传输速率得到较大提高，是解决系统I／O瓶颈问题的一种有效方法。

Setting a main adapter between EISA bus and peripheral SCSI bus of high-performance personal computers will greatly increase data transmitting speed , and hence is an effective solution to the problem of I / O bottle neck of PC system .

自1993年PCI（Peripheralcomponentinterconnect，外部设备互联）总线标准建立，PCI已经成为一种被广泛采用的总线结构，应用于从便携式电脑到大型服务器等多种计算机系统中。

From the emergence of PCI ( Peripheral Component Interconnect ) in 1993 , PCI has been widely adopted as a high performance bus protocol and used in various systems ranging from portable computer to supercomputer .

采用锁相环技术产生象素时钟，采用FPGA技术来设计采集系统的逻辑控制和ADC、外部存储器以及PCI总线控制器之间的时序协调工作。

Using phase lock loop technique based on FPGA , produce pixel clock technology to design collection system logic control and ADC and external memory and PCI bus between controller of sequential coordinate work .

外部目的地是一种设计用来将消息发送到外部总线的目的地。

A foreign destination is a type of destination that is designed to send messages to the foreign bus .