闪速存储器

本文介绍了闪速存储器的结构特点和工艺技术，并与EPROM和EEP－ROM电路进行了比较。

This paper introduces the FLASH MEMORY circuits technique and structure characteristic , also compared the circuits with that of EPROM and EEPROM .

单管多位MNOS结构闪速存储器的研究

Study of Multi-bit MNOS Flash Memory

文中重点分析SGF闪速存储器的单元结构，以及擦除、编程和读取等操作；

The structure features of Split Gate Flash memory were described .

介绍了闪速存储器K9F1208UOM芯片的结构和功能；

Introduces the structure and function of K9F1208UOM ;

NAND型闪速存储器采用串行结构，I/O端口既作为地址和命令的输入口，又作为数据的输入/输出口，与微控制器的接口简单。

The NAND flash memory is a serial-type device , which utilizes the I / O pins for both address and data input / output as well as for command inputs , eases interfacing to microcontrollers .

测试结果表明该结构的工作电压比传统NAND结构的存储器单元降低了4V.采用该结构能够实现高速、低功耗和高可靠性的半导体闪速存储器。

Experimental results show that the operation voltage can be as much as 4V less than that of conventional full F-N tunneling NAND memory cells . Memory cells with the proposed structure can achieve higher speed , lower voltage , and higher reliability .

此外，威廉姆斯为苹果做了大量幕后工作，例如与海力士（Hynix）等供应商签订协议，预付约12.5亿美元的订金购买闪速存储器。此举对Nano音乐播放器的推出大有帮助。

Williams has done a lot for Apple , all of it behind the scenes , such as his work on a deal to prepay suppliers like Hynix some $ 1.25 billion for flash memory , a move that helped Apple launch the Nano .

提出了一种用于半导体闪速存储器单元的新的Si/SiGe量子点/隧穿氧化层/多晶硅栅多层结构，该结构可以实现增强F-N隧穿的编程和擦除机制。

A novel flash memory cell with stacked structure ( Si substrate / SiGe quantum dots / tunneling oxide / poly-Si floating gate ) is proposed and demonstrated to achieve enhanced F-N tunneling for both programming and erasing .

应用闪速存储器实现盘文件系统探讨

Research on the methods of implementing a flash memory file system

闪速存储器中的热载流子可靠性研究

Study of the hot carrier reliability of the Flash Memory

低电场应力下闪速存储器的退化特性

Degradation in Flash Memory Under Low Electric Field Stress

采用闪速存储器的数字记录仪

A New Digital Recorder Based on Flash Memory

闪速存储器的研究与进展

Research and Progress of Flash Memory

并详细论述串行闪速存储器在智能仪器中的应用和软件设计。

The application of flash memory in the smart instruments and software design is discussed in detail in the paper .

为了在现有条件下进一步降低闪速存储器的单位成本，已开发了各种单管多位技术。

To reduce bit cost in the same generation of process , multi-bit in one cell technology has been developed for flash memory .

提出了一种测量闪速存储器存储单元浮栅电压耦合率的方法。

A method for measuring the coupling rate of the floating-gate voltage in Flash Memory cells is presented and proved to be feasible .

主要介绍闪速存储器的技术分类，以及各类技术架构的特点和功能，简要对比了目前市场上各大存储器厂商的主要产品；

The technical classification of flash memories and the features and functions of various types of technical architectures are described , and the main products available in the market place from the major memory manufacturers are briefly compared .

并利用电容耦合效应模型对闪速存储器存储单元的可靠性进行了研究，结果表明，在低电场应力下，其可靠性问题主要由载流子在氧化层里充放电引起。

The reliability of flash memory cells is investigated using the capacitance coupling effect model . The results show that the cell reliability under a low electric field stress is mainly affected by the carriers charging and discharging inside the oxide .

在此基础上综合运用二维条码技术、蓝牙技术、数字成像技术、微控制器技术、闪速存储器技术、液晶显示技术和触摸屏技术，设计并开发了适应现代物流运行需要的掌上物流数据采集器。

Synthetically using the two-dimension bar code technology , bluetooth technology , digital imaging technology , micro-controller technology , flash memory technology , LCD and touch screen technology , a goods delivery confirmation system is invented and a portable information collection device is designed to gear to the modern logistics .

在一些脱机运行的数字信号处理器（DSP）系统中，用户代码需要在加电后自动装载运行闪速（Flash）存储器并行自举是DSP入门套件（DSK）脱机工作的首选方法。

In some off-line-running DSP systems , after powered on customer codes need be firstly run automatically . The first choice is synchronous Flash boot-load for DSP off-line working .

由于闪速/电擦除存储器的结构，擦除必须以页为单位完成，因此给出一个擦除命令时，至少将擦除4个字节（1页）。

When an order was given , at least 4 bytes ( one page ) would be erased .