晶粒间界
- grain boundary
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在微观结构的基础上导出了晶粒间界的电容公式,与由实验作出的C~V曲线,两者基本一致。
The formula for calculating capacitance per grain boundary has been derived on the basis of microstructure of ZnO varistors . The c-v curve has been experimentally obtained and the theory is in agreement with the experiments .
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考虑了晶粒间界厚度和其中的少数载流子复合,假设晶粒间界和晶粒具有不同的少数载流子迁移率和寿命。
The minority carrier recombination in grain boundary and its width are considered .
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ZnO压敏陶瓷晶粒间界效应
Grain Boundary Effect of ZnO Voltage Sensitive Ceramic
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铝原子在多晶硅晶粒间界分凝的AES研究
Study of Aluminum Atom Segregation at Grain Boundary of Polycrystalline Silicon by AES
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多晶硅TFT有源层晶粒间界的研究
The Study Of Grain - Boundary Of Polysilicon TFT Active Layer
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分析了n型半导化TiO2压敏陶瓷中晶粒间界处的受主态性质,得出为晶界受主态的能级是多级化的;
An analysis based on property of the acceptors at grain boundaries of semiconducting n - TiO2 varistor ceramic and the distribution with multi energy levels were considered in this paper .
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卤化物,特别是KCl被认为是高功率激光窗口最佳候选材料。为了研究热锻KCl的显微结构稳定性,用化学浸蚀法显示了晶粒间界并用光学显微镜进行了观测。
Alkali halide materials , with KCI in particular , have been considered as a promising candidate for high energy laser window .
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两种行之有效的晶粒间界限制技术:热沉结构和硅槽结构使区熔再结晶SOI实现定域无缺陷,这是采用区熔技术制备SOI的技术关键和难点所在。
In this paper , such effective techniques as Heat Sink structure and Grooved structure have been proposed to localize grain-boundaries during Zone-Melting - Recrystallization ( ZMR ) . These techniques are the key points of ZMR-SOI technology .
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提出了一个晶粒间界的物理模型,以解释多晶硅薄膜晶体管(TFT)的低载流子迁移率和高阈值电压。
In this paper , a physical model of grain boundaries is presented to explain the low value of carrier mobility and the high value of threshold voltage for poly-silicon thin film transistors ( TFT ) .
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晶粒间界相对纳米硬磁材料各向异性的影响
Effect of intergranular phase on the anisotropy of nanometer hard magnetic materials
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晶粒间界对於铝晶体中形成亚结构的影响
Effects of grain boundaries on the formation of sub-structures in aluminium crystals
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有两种面积缺陷,即孪生和晶粒间界。
Two area defects are twins and grain boundaries .
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晶粒间界局域无序化引起的滞弹性弛豫
Anelastic relaxations associated with local disordering in grain boundaries
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杂质常常在晶粒间界偏析。
Impurities tend to segregate at grain boundaries .
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多晶硅晶粒间界的线性陷阱模型
Linear Trapping Model of Polysilicon Grain - boundary
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其中,第一个晶粒间界能够最有效地减少注入饱和少数载流子电流。
The injecting saturate minority carrier current may be reduced the most effectively by the first grain boundary .
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计算结果表明,多晶硅晶粒间界的线性陷阱模型具有理论合理性。
The calculation results show that the linear trapping model of the grain-boundary is possessed of theoretical reasonableness .
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本文提出了晶粒间界电流调整的新概念。
A new concept about current adjustment of the grain boundary in polycrystalline silicon resistors has been proposed in this paper .
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给出了多孔的金属氧化物半导体气敏晶体的既含晶粒间界传感作用又含晶粒缩颈传感作用的截面电导公式。
The cross-section conductance formula , which contains the sensing function of grain-boundaries and grain-necks in porous metal oxide semiconductor gas sensing crystals , is proposed .
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因此,可以认为多晶纯铜在较高温度下的滞弹性蠕变机构与晶粒间界自扩散机构相似。
The mechanism of anelastic creep of polycrystalline copper at higher temperatures may thus be considered to be similar to the mechanism of grain boundary self-diffusion .
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80年代以来,我们在含有竹节晶界的高纯铝试样里发现了一个坐落在温度低于细晶粒间界内耗峰(葛峰)峰温处的内耗峰。
In the eighties , an internal friction peak situated below the peak temperature of the grain boundary peak of fine-grained specimens ( the Ke peak ) was observed in high-purity aluminium consisting of bamboo crystals .
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与此同时,本文还得到了能够降低注入饱和少子电流百分之十以上的有效晶粒间界个数与晶粒/晶粒间界界面态密度和晶粒大小之间的关系。
Meanwhile , the relationship between the number of effective grain boundaries , which reduce injecting saturate minority carrier current more than ten percent , and the interfacial state density of grain boundary and grain size has also been presented .
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所测得蠕变激活能为(25±1)千卡/克分子,比纯铝体积自扩散激活能低,与晶粒间界自扩散激活能相接近。
The activation energy associated with the creep is found to be 25,000 ± 1,000 calories per mole . It is much smaller than the activation energy for the volume self-diffusion and is close to the activation energy for the grain boundary self-diffusion .
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氧气在这种多晶薄膜上的吸附提高了薄膜中晶粒间的界现势垒,并改变了晶粒中的载流子浓度。
The oxygen adsorption on the film increases the grain-boundary potential and changes the carrier concentration in the crystallite .
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该模型认为,多晶Si电阻是由一系列晶粒和晶粒间界形成的小电阻串连组成的,其值依赖于晶粒间界尺寸的大小。
The model shows that the polysilicon resistance are made up of many small resistance which is formed by grains and grain boundary , and the value of polysilicon resistance depends on the size of grain boundary .
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随着溅射时间和膜厚的增加,薄膜的晶化程度逐渐提高,晶粒也逐渐长大,晶粒的长大弱化了晶粒间界散射,提高了载流子的寿命和迁移率,使得薄膜的电阻率降低。
The crystallite sizes become larger and the crystallinity of the resulting films improves with the increasing of the sputtering time and the film thickness . These decrease the scattering by the grain boundaries and enhance the carrier lifetime and hall mobility , leading to the decrease of the resistivity .