同步信号

利用CPLD设计视频同步信号发生器

Using CPLD to design video sync signal generator

接着，本文利用北斗接收机、GPS接收机和外部IRIG-B码作为系统的外同步信号，互为热备用。

Then , Bei-dou receiver , GPS receiver and external IRIG-B code use as the external sync signal , hot spare of each other .

其结果也表明了symbol同步信号的存在。

The estimation results show that there is a symbol synchronous signal .

用FPGA实现异步信号和同步信号的复接

The multiplex of synchronous signal and a synchronous signal Implemented by FPGA

基于FPGA的位同步信号提取

Extraction of Bit Synchronization Signal Based on FPGA

基于FFT的快速跳频同步信号存在性检测

FFT-based Detection of Existence of Synchronization Signal for FFH System

基于CPLD的锁相位同步信号提取技术

Getting Technology of Bit Alignment Signal of Phase-locked Loop Based on CPLD

采集的四路同步信号经过PCI总线传到DSP处理。

The four synchronous signals of data collection cards are processed by DSP through PCI bus .

利用DSP的高精度时钟配合同步信号源以提高同步时钟的可靠性。

The high-precision clock of DSP is incorporated with the GPS clock to improve the reliability of synchronous clock .

用CPU产生同步信号在本质上改变了同步机的设计方法。

The synchronous signals produced by CPU have brought fundamental changes into the designing of synchros .

基于综合同步信号控制方式的TCSC仿真与动模实验

Emulation and dynamic simulation of TCSC control with synthetic synchronizing signal

为突出脑-机接口中局部脑电的事件相关去同步信号，将算法简单的高提升滤波（highfrequencyemphasis，HFE）用于信号的数据预处理。

To emphasize local event-related-desynchronization signal of EEG-based brain-computer interface ( BCI ), the simple algorithm & high-frequency-emphasis ( HFE ) was applied for data preprocessing .

同步信号的引入，增强了水印抵抗裁剪、MP3压缩等攻击的鲁棒性。

Especially , it can be against the cropping and MP3 compression attacks for being embedded synchronization code .

本文描述了一种基于PCI总线的高级在轨系统（AOS）帧同步信号发送器的设计与实现。

This paper particularly describes the design & implementation of AOS Synchronous Transmitter based on the PCI Bus .

同步信号及电路参数对可控串补（TCSC）动态特性的影响

The Effect of the Synchronizing Signal and the Circuit Data on the Dynamic Characteristics of TCSC

研究了基于DSP的三相交-交变频控制系统，并设计了相应的零电流检测电路，同步信号检测电路和I/O扩展电路。

In this paper , the cycloconverter-fed control system is studied based on DSP . The zero-crossing detection circuits , synchronous signal detection circuits and I / O expansion circuits are designed .

该系统主要由分光系统、CCD传感器、光脉冲同步信号发生器、数据采集卡及计算机等部分组成。

The system mainly consists of a beam-splitting system , a linear CCD , a pulse laser synch - ronous signal generator , a sampling data card and a computer .

提出闭环阻抗控制，用以改善以电容电压为同步信号时TCSC的阻抗阶跃特性。

A close-loop control is put forward to improve the step characteristics of TCSC with capacitive voltage as its synchronization signal .

此外，作者还对CP类型检测、小数倍频偏估计、辅同步信号检测以及频率跟踪算法进行了性能和复杂度分析，并在此基础上提出了一种TD-LTE小区搜索和下行同步过程的完整设计方案。

In addition , the author discuss the CP type detection , frequency offset estimation , SSS detection and frequency tracking algorithms .

以电容电压uc作为同步信号时，故障后系统中未出现明显直流分量，但出现明显的低次谐波。

Taking the capacitor voltage uc as synchronizing signal , there is not serious DC component in the power system , but serious low-order harmonics .

阐述了一种主要用于检测视频同步信号的基于ISA总线的视频发生器模块的设计过程。

In this thesis , a kind of ISA-based TV video generator is presented , which can be used to test the video synchronization given from outside .

同时给出了同步信号的组成、同步系统的应用，以及PCI接口电路的实现方法，并利用VC++6.0完成PCI驱动程序的编写。

Furthermore , composition of synchronize signal and application of synchronize acquisition system were described . PCI interface circuit was proposed . And its driver program was compiled in VC + + 6.0 .

基于ZC序列的TDD-LTE同步信号频率校正研究

Study on the frequency offset correction of TDD-LTE synchronization signal based on ZC sequence

通过视频同步信号发生器的设计实例，详细描述了基于VHDL进行系统芯片设计方法的应用过程，并进一步讨论了在实际应用中VHDL程序设计的优化问题和应用技巧。

Through the example of video synchronous signal generator the design process of system on chip is particularly described . Moreover the optimization of system and VHDL programming skill is discussed .

我们以Z80微处理机为核心，组成了彩色电视同步信号和彩色测试卡发生装置。

Based on the microprocessor Z-80 a test-card generator for colour TV with synchronizing is realized .

根据主电路拓扑结构，设计了其控制电路，包括同步信号电路、缺相检测电路、锁相倍频电路和PWM脉宽调制电路的设计。

According to the topology structure of main circuit , design the control circuit . It includes design of locking signal circuit , lacking phase detection circuit , locking phase and frequency multiplication circuit , and PWM pulse-width modulation circuit .

介绍利用CPLD设计视频同步信号发生器的思路，讲解了AHDL的编程技巧，并对一些相关问题进行了讨论。

This paper introduces the idea of designing video synchronous signal generator by CPLD , demonstrates the techniques of programming with AHDL , and discusses some related problems .

如BITS就是一种时钟设备，它提供用在通信系统中控制某些功能的定时的时间基准设备，时钟提供的信号称为基准信号、定时信号或同步信号。

For example , BITS is a kind of timing equipment , which is used to control the timing of some functions . The signal provided by the equipment is called primary signal , timing signal and synchronization signal .

故障诊断系统主要包括同步信号的取样与隔离、整流电压的采样、逻辑预处理及DFT分析，诊断显示报警电路等四部分。

The fault diagnosis system includes four parts : sampling and insulation of the synchronous signal , sampling of the voltage waveform of the rectifier , logic pre-processing and DFT analysis , display and alarm circuit .

本文设计的模块具备同时产生并输出一路单色及一路RGB彩色视频信号的能力，还可以输出复合同步信号和分离的行场同步信号，叠加外部的视频信号。

The module has the capability of generating and outputting one channel of monochromatic and one channel of RGB color video signal . And it can output composite synchronization signal , horizontal and vertical synchronization signals .