edac

The Design of EDAC System for Solar Space Telescope

空间太阳望远镜EDAC系统的设计

A self-checking EDAC design based on FPGA for spacecraft computer

基于FPGA的星载计算机自检EDAC电路设计

A Software / Hardware Cooperation EDAC Method against Bit-Flips of Memory

抗内存位翻转的软硬件协同检错纠错方法

At the same time , compared with typical EDAC chips , this system can realizes real-time error correction .

同时，与典型的EDAC芯片相比，本系统实现了差错的实时回写。

EDAC for constants to define optical glass refraction

对计算玻璃折射率的常数的纠错

To alleviating the effect caused by SEU , we use software based EDAC to guarantee the integrity of the memory system .

为了减轻主控计算机的内存模块受到的SEU影响，采用了基于软件的EDAC方式对内存进行保护。

Conclusions The dynamic disinfection effects of EDAC is better than that of static disinfection methods such as ultraviolet radiation , ect .

结论静电式空气消毒洁净器具有较高的除菌作用，其动态除菌效果优于紫外线等消毒方法。

Design and Implementation of the RAM EDAC Module in the House-Keeping Computer of the TS-1.1 Satellite

TS-1.1小卫星星务计算机RAM纠检错电路的设计与实现

EDAC , TMR and CFC were implemented in VHDL on FPGA .

用VHDL描述并在FPGA上实现EDAC、TMR和CFC。

The simulation result show that comparing with LEACH and EDAC , ACRA minimizes the rotation times , prolongs the network lifetime .

仿真结果表明，与现有算法如LEACH，EDAC等比较，ACRA算法最少化簇头轮换次数，延长了网络生存时间。

At the same time , the support of software fault tolerance by the way of the EDAC ( Error Detection And Correction ) and the protection of system stack were added .

同时对μC/OS-II操作系统以及应用程序进行改进，在程序的内部加入了错误检测和校正（EDAC）、函数堆栈保护等容错功能。

Objective To explore the effect of acellular bovine pericardium ( ABP ) treated with EDAC used as a barrier membrane for guiding bone regeneration , and to evaluate its biocompatibility .

目的评价碳化二亚胺（EDAC）交联处理的脱细胞牛心包的引导成骨作用，并观察生物相容性。

The concept and idea of error diagnosis and correction ( EDAC ) in formal verification of SOC are reviewed , and two approaches for EDAC , simulation-based approach and symbolic approach , are described in the paper .

文章首先介绍了SOC形式验证中故障诊断的概念和思想，然后分别讨论了两类故障诊断法：模拟诊断法和符号诊断法。

Based on this , a new architecture of external memory controller with EDAC was presented . And memory controller IP core with EDAC was implemented with verilog hardware description language , the simulation and logical synthesis of which were done either .

最后提出了具有检错纠错功能的外部存储器控制器IP核的体系结构，并基于verilog硬件描述语言实现了该检错纠错存储器控制器IP核，对其进行了功能仿真和逻辑综合以及综合后仿真。