控制存储器

所测的故障有连线上的固定故障、线组中的桥接故障、控制存储器CM中的存储单元固定故障、CM相邻耦合故障和CM多重存取故障。

The detected faults include stuck-at faults on connective lines , bridge faults on line groups , control memory ( CM ) cell stuck-at faults , CM adjacent cell coupling faults and CM multiple access faults .

MPU/MCU接口可以控制存储器接口和存储控制器的状态；

MPU / MCU interface could control memory interface and the state of the new memory controller .

MCU控制存储器的USB接口技术

USB Interface Technology for Memory Controlled By MCU

介绍了一种用RAM代替CPU中控制存储器的软件和硬件系统。

A software and hardware system to replace control storage in CPU with RAM is recommended .

一个控制存储器通常以二极管阵列或只读记忆体的方式被实现。

A control store is usually implemented as a diode-array of read-only memory .

依据外部事件或条件将信息从控制存储器中取出的一种线路。

A circuit that pulls information from the control store memory based upon external events or conditions .

可写控制存储器程序设计

Writable control storage programming

一种将符号形式（类似于汇编语言）的微程序翻译成位模式的程序，然后位模式被装入控制存储器。

A program that translates microprograms in symbolic form ( similar to assembly language ) into bit patterns that are then loaded into the control store .

最后，您将使用不受垃圾收集器控制的存储器设计和实现一个RT应用程序，发现使您的RTJava应用程序发挥最大效能的提示与技巧。

Finally , you will design and implement an RT application using memory that 's not controlled by the garbage collector and discover tips and tricks for getting the most from your RT Java application .

主控制器的硬件电路以DSP微处理器TMS320VC5509为主控芯片，分为通信接口、逻辑控制、存储器扩展和电源四个功能模块。

The hardware can be divided into four modules , which is communication interface module , logic control module , memory expansion module and power module .

采用传统串口（RS232、RS485）或者并口作为MCU控制的存储器的接口，存在传输速度与占用系统资源之间的矛盾。

There exists a contradiction between transfer speed and system resources possessed by interface when using traditional serial interface ( RS232 、 RS485 ) or Parallel interface as the interface between memory and PC controlled by MCU .

可编程逻辑器件CPLD完成对整个系统的逻辑控制以及提供存储器写数据的地址。

The CPLD is used to control the logic of whole system , and it also provides the write address of memory .

离散制造系统控制策略与存储器容量的组合优化

Combined Optimization of Contral Strategies and Buffer Sizes in Discrete Manufacturing Systems

网络控制下静态存储器的动态检测系统

Dynamic testing system of SRAM under the network control

因为即使是在这么低的权限下，你也能熟练控制电脑的存储器，你就可以窃取别人的秘密，如果知道相应数据位于哪里的话，你也能窃取别人的数据。

Cause when you can actually manipulate a computer 's memory at this low level , you can steal people 's passwords , you can steal their data if you know how that memory is laid out .

基于FPGA控制的高速固态存储器设计

High-speed Solid State Recorder Based on FPGA Main Control Logic

采用热点推出控制机制的共享存储器型ATM交换机仿真评价

Performance Simulation of Shared Buffer ATM Switches Using Hot-Spot Push Out Mechanism

RAM和ROM的技术和类型，存储器控制电路，特殊存储器，高性能接口。

Technologies , Types of RAM and ROM , Memory Controller Circuits , Specialty Memories , High-performance Interfaces .

控制单元由程序存储器ROM、指令译码器、地址生成模块、程序计算器PC组成。

The control path contain Instructor ROM , instructor register , instructor decode unit , address creating module and Program Counter ( PC ) module .

FPGA实现MVB控制器功能，分为曼彻斯特编码器、解码器、缓冲区、中央控制单元、内部存储器和单片机接口等几部分。

The FPGA is designed as a MVB controller which consists of Manchester encoder , Manchester decoder , buffer , center control unit , internal memory , MCU interface and so on .

该图像采集卡由五大部分组成：CMOS图像传感器电路、CPLD控制电路、SRAM存储器、数字信号处理器DSP和基于USB2.0接口的数据传输部分。

The image acquisition card contains the following five parts : CMOS image sensor circuit , CPLD control circuit , SRAM storage , digital signal processor and data transferring part based on USB 2.0 interface .

其中主控制层部分包括存储器电路、CAN总线电路、以太网、LCD与触摸屏电路、电机驱动电路等，机头控制层包括电磁铁驱动、选针器驱动、步进电机驱动电路等。

The main control layer includes interfaces such as memory , CAN bus , Ethernet , LCD , touch screen and motor drive circuit , etc. The head control layer includes solenoid drive circuit , needle selector drive circuit , stepper motor drive circuit .

结果表明：合理安排不同类型的控制事件写入CAM存储器的顺序，可适当提高HSO系统控制外部事件的容量；

The experiment results showed that the sequence that the different type control events write to the content addressing memory is reasonable arranged , the capability that the high-speed output control external events can proper increased ;

重点解决了系统综合控制方式、共享存储器互斥、握手信号产生及系统自检测等问题。

The issus such as system integrated control , mutual exclusion of the shared storages , generation of handshaking signal and system self-test were resolved .

对存储数字的代数符号的特殊触发器的控制。控制用只读存储器指令表

The control of a specific flip-flop which stores the algebraic sign of numbers . CROM instruction set

用分组直接控制法可使微指令字长和控制存储器的容量减少50%以上，可降低微处理器芯片的成本、提高微处理器的性能价格比。

Using SDC both the word length of microinstruction and the capacity of control memory can be reduced at least 50 % , cost of microprocessor chip can be reduced and cost / performance of microprocessors can be improved .

CPLD主要控制步进延时脉冲信号发生器产生步进延时脉冲以及对控制存储器对A/D转换后的数据进行存储。

Step delay pulse generator , and the data are stored in memory is converted by A / D converter are controled by CPLD .

并将ARM控制技术和扩频相结合，给出了语音通信模块设计、主控制模块中扩展存储器设计、扩频处理模块、CPLD模块等硬件组成及结构；

It uses ARM and spread spectrum together and gives hardware of pronunciation communication module , extended memory of main control module , spread spectrum treating module , CPLD module and so on .

在驱动和控制模块中，采用Veriloghdl实现处理模块与传感器之间的采样控制、与SDRAM存储器以及与VGA显示器之间的时序要求。

In the drive and control modules , processing module using Verilog HDL to achieve between the sample and the sensor control , and meet the timing requirements of SDRAM memory and VGA display .