帧频

低帧频，无闪烁LED全彩屏的逻辑设计

The Logic Design of a Full Color LED Display with Low Frame Frequency and no Flicker

基于卡尔曼与模糊PID的高帧频图像识别跟踪系统

Image Recognition and Tracking System for High Frame Frequency Object Based on Kalman Predictor and Fuzzy PID Technology

结论BFlow有更高帧频、高分辨力和全景显示功能。

Conclusion B Flow has more functions of high frame rate , high dynamic range and bandwidth .

优化帧频控制的LCD控制器IP的设计与验证

Design and Verification of LCD Controller IP Using Optimal Frame-rate Control

基于FPGA的大面阵CCD高帧频驱动电路设计

Design of FPGA-Based High Frame Rate Driving Circuit for Array CCD

高帧频CCD图像传感器驱动时序设计

Design for CCD Image Sensor Schedule Generator with High Frame Rate

高帧频CCD光纤传输系统的设计与实现

Design and Implementation of Fiber-Optic Transmission System for High Frame-Rate CCD Signals

高帧频CCD数据采集处理系统的设计

Design of High Frame Rate CCD Data Acquisition System

基于PCIExpress总线的高帧频CMOS相机图像采集系统设计

Design of high frame rate CMOS image acquisition system based on PCI Express

扫描格式转换的自适应帧频提升算法及其FPGA实现

A New Adaptive Frame Rate Upconversion Algorithm for Scan Rate Conversion and Its FPGA Implementation

高帧频面阵CCD探测器应用技术研究

Applications of high frame rate CCD detectors Technology

基于CMOS图像传感器的高帧频相机研制

Study Of High-speed Camera Based On CMOS Image Sensor

在APT系统中，涉及到对高帧频CCD的采集和实时处理控制。

APT system base on connection of high frame frequency CCD and realtime process .

具有场帧检测的自适应帧频提升算法及VLSI实现

Adaptive Frame Rate up Conversion with Field-Frame Detection and VLSI Implementation

大面阵高帧频可配置CMOS数字视频系统研究与实现

Research and Realization of Huge Frame and High frame speed configurable CMOS Digital Video System

CMOS高帧频瞬态摄像机

CMOS High Frame Rate Transient Camera

高帧频大动态范围CMOS图像传感器时序控制电路的设计与实现

Timing Control Methods for New CMOS Image Sensor with High Frame Rate and Wide Dynamic Range

在多行（COMMON）快速帧频响应的多路寻址液晶驱动设计中采用正交块循环矩阵可大大降低实现成本。

This new application with Orthogonal Block Circulant Matrix will bring great scale cost down range in MLA-LCD design in the condition of high COMMON count and fast frame .

针对某高帧频CCD可见光相机的设计要求，提出一种可行的驱动时序设计方法。

Put forward an available method aimed at the requirements of CCD visible light camera with high frame rate .

高帧频大面阵彩色CMOS相机Bayer滤波器解码算法

Bayer Filter Decode Algorithm in High Frame and Big Area Color CMOS Camera

我们选择了大阵列高帧频的CCD像机对跟踪目标的图像信息进行快速提取。

We have applied a CCD with high frame frequency and great array to realize the fast speed data acquisition .

高帧频MOS电阻阵红外成像目标模拟器实时控制研究

Study on Real-Time Control of IR Imaging Simulator Based on High Frame Rate MOS-Resistance Arrays

介绍了高帧频大面阵彩色CMOS相机的Bayer滤波器解码算法，实现了彩色图像输出。

This paper introduces Bayer filter decode algorithm of high frame and big area color CMOS camera , and realizes color image output .

该系统完成对H－S波前传感器输出的高帧频图象信号的采集、处理，并计算出波前校正所需的控制信号，处理速度不低于250帧／秒。

The sampling and processing for the high frame image signal of H S wavefront sensor have been carried out by the system and the control signal required by the wavefront correction is calculated out .

应用视觉感知实验的方法对移动显示（手机）用LCD的运动图像质量进行了主观评价，研究了帧频、响应时间和视频图像内容对运动图像质量的影响。

Quality of moving images on mobile LCD is estimated by a visual perception experiment to investigate the influence of frame frequency , response time and video content .

它采用三片SDRAM芯片作为帧存储器，能实现显示帧频和分辨率的变换。

Three SDRAM chip is used as frame store to fulfill the conversion of frame frequency and display resolution .

采用三相全帧帧转移结构和常规的CCD工艺，设计并研制了一种高速摄像用256×256元高帧频可见光CCD成像器件。

By using three-phase full-frame frame transfer structure and common CCD technology , a 256 × 256 high frame-rate visible light CCD used in high speed photography is designed and fabricated .

提供了对隔行数字视频进行去隔行，帧频转换，分辨率变换的最简FPGA设计方案.达到FPGA内部资源和外部RAM耗用量都为最小的目的。

A most compact FPGA designing scheme of de-interlacing , frame rate conversion and rescaling for interlaced digital video with the least consumption of FPGA resources and outer RAM is provided .

本文介绍了一种应用于H－S法波前探测的高速图象采集系统，提出了应用本图象采集系统解决高帧频探测器阵列与数据处理机之间的同步协调的方法。

A high-speed image collecting system used in the H-S wavefront detection is presented in the paper . The image collecting system is applied to solving the coordinating problem between high frame rate detector array and data processor .

该设计使用了基于空间散列的帧频控制算法以优化LCD显示图像质量，并使用两级缓存结构以保证稳定的输出数据流。

This design uses a frame rate control algorithm based on space-hash to improve the quality of the LCD display . It uses two-level buffer structure to ensure steady output flow .