分频器
- 网络Divider;Frequency divider;Crossover;X-over
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的SI-28是一个2路与内部无源分频器,它提供了一个单一的系统包出众的带宽和输出声压级全套系统。
The SI-28 is a2 way full range system with an internal passive crossover that provides exceptional bandwidth and output SPL in a single system package .
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此分频器是根据经验设计的,并不局限于传统理论的公式。
The crossover was developed empirically , without confinement to the traditional textbook filter formulas .
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应用于GPS接收机频率综合器分频器的设计
The Design of Divider for Frequency Synthesizer Applied in GPS Receiver
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基于FPGA的半整数及整数分频器的参数化设计
Parameterized Design of Half-Integer and Integer Frequency Dividers Based on FPGA
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基于FPGA技术的16位数字分频器的设计
Design of sixteen bits digital frequency divider based on FPGA
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基于FPGA/CPLD的占空比为1∶n的n分频器的设计
Design of n Frequency Divider Whose Duty Ratio is 1 ∶ n Based on FPGA / CPLD
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基于FPGA的等占空比任意整数分频器的设计
Design of the Equal Duty Ratio Arbitrary Integer Frequency Divider Based on FPGA
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基于FPGA的小数分频器的实现
Realization of Decimal Frequency Divider Based on FPGA
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基于GAL的可程控n分频器设计
Design of Programmable Control n Frequency Divider Based on GAL Chip
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应用于OFDMUWB系统的高速分频器研究与设计
Research and Design of High-speed Frequency Dividers for OFDM UWB System
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0.6μMCMOS静态分频器电路设计
Static Frequency Divider Circuit Design Using 0.6 μ m Standard CMOS Process
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0.18μmCMOSPLL频率综合器中可编程分频器的设计与实现
0.18 μ m CMOS Programmable Frequency Divider for PLL-Based Frequency Synthesizer
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CMOS高性能奇数分频器的设计
The Design of High Performance CMOS Odd Divider
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GaAs高温栅全离子注入平面工艺及GaAs数字二分频器
GaAs full Ion Implantation and Refractory Gate Planar Process and GaAs Digital Divider
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LC二分频器与电子分频器的性能比较
Performances Comparison of LC Frequency Divider and Electronic Frequency Divider
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基于CPLD的任意整数半整数分频器设计
Arbitrary Integral or Half-integral Frequency Division Designed with CPLD
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介绍了典型N数字小数分频器的工作过程,在此基础上分析了由级联累加器实现的积分功能。
The working process of typical N Digital fractional frequency divider is introduced and the integration function performed by cascaded accumulators is analyzed .
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GaAs高速动态分频器在片测试研究
On-Wafer Testing of High-Speed GaAs Dynamic Frequency Divider
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基于VHDL的全数字分数分频器设计
The Design of Total Digitized Fractional Frequency Divider Based on VHDL
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基于VHDL的可编程分频器在波形发生器中的应用
Application of programmable dividing frequency device to waveform generator based on VHDL
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发射极条宽为3微米时,fγ>3GHz。该工艺已应用于超高速双极ECL分频器中。
This technology has been applied to very high speed bipolar ECL frequency dividers .
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半整数分频器的VHDL设计
The design of half integer frequency divider with VHDL
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阐述了在不提高外部振荡频率的前提下,保证各唱名频率精确度的方法,给出了用ABLE语言编写的实现小数分频器和控制、译码电路程序。
With on increase of the exterior oscillation frequency , the precision of the note frequency is secured . The control and decode sequence is composed with ABLE language .
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根据项目指标要求,以上述两种分频器为基础,重点构建了由7/8预分频和P、S计数器组成的多模分频器结构。
According to requirment of project target , a multi-modulus divider constituted with a 7 / 8 prescaler and P , S counters , is designed with the two proposed divider .
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WSN射频芯片中6GHzRFCMOS低功耗双模前置分频器的设计
Design of 6 GHz RF CMOS Low-Power Dual-Modulus Prescaler in WSN RF Chips
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分频器电路采用0.18μMCMOS工艺设计,用于WCDMA通讯系统中。
The frequency divider implemented in a 0.18 μ m CMOS process is used in WCDMA system .
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在这个CML分频器基础上,设计了一个可编程分频器。
Based on the CML divider , a programmable divider was implemented .
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利用该系统在片检测了GaAs高速数字集成电路动态分频器内部的高速电信号。
The high-speed electric signals at internal points in the high-speed GaAs digital integrated circuit-dynamic frequency divider were measured .
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作为输入缓冲级用于GaAs高速分频器和D触发器电路,已得到初步结果。
As an input buffer of GaAs frequency divider and D-F / F , it has shown satisfactory results .
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窄带调相信号通过R倍分频器后,调制信号功率将下降。
When a narrow band phase modulated signal is passed through a frequency divider with division ratio R , the power of the modulating signal is reduced .