VDD
- abbr.版本说明文件(Version Description Document);飞行器探测装置(Vehicle Detection Device);虚拟设备驱动器/程序(Virtual Device Driver)
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Clinical application of a single lead VDD pacing system
单根电极VDD起搏器的临床应用
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Results : VDD pacing system was successfully implanted in 25 patients .
结果:25例均成功置入VDD起搏系统。
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Conclusion : VDD pacing is an effective new method to treat patients with HOCM .
结论:VDD起搏植入简便、房室同步功能稳定,对HOCM患者不失为一种新的有效的治疗方法。
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Initial Clinical Experience of VDD Pacing in Patients with Obstructive Hypertrophic Cardiomyopathy
VDD起搏器治疗肥厚性梗阻型心肌病临床初探
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Measurement of Atrial Sensing Function in Patients With Single Lead VDD Pacemaker CHRONIC ATRIAL TACHYCARDIA
单根电极心室起搏双腔感知双重反应型起搏器心房感知功能的测试观察慢性房性心动过速
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The VDD input is also used as the reference for the part so that no external reference is required .
VDD输入同时用作器件的基准电压,因而无需外部基准电压。
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Objective To observe the clinical application of single lead DDD and VDD pacing in elderly .
目的观察老年人单导管双腔起搏器(DDD)和心房感知型起搏器(VDD)起搏系统的临床应用。
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Objective : We report our clinical use of VDD pacing in one patient with HOCM and its hemodynamic effects .
目的:用VDD心脏起搏治疗1例肥厚性梗阻型心肌病(HOCM),并观察其临床及血流动力学效果。
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Initial Clinical Experience With a Single-pass Lead VDD , VDDR Pacing System ( Report of 7 Cases )
单根电极VDD起搏器的初步应用(附七例报告)
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By removing power line ( Vdd ) and bank photo process , we simplified the fabrication process from 8 to 6 mask steps .
通过去除电源线(Vdd)和触排(bank)光处理工艺,将8步掩模简化至6步。
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A method and apparatus for high performance volatile disk drive ( VDD ) memory access using an integrated direct memory access ( DMA ) engine .
一种方法和装置,用于使用集成直接存储器访问(DMA)引擎进行高性能易失性磁盘驱动器(VDD)存储器访问。
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We report 6 cases with 8 leads dislocation . Five patients were implanted with DDD pacemakers and one with VDD pacemaker .
报道6例起搏器电极导线脱位,1例为VDD起搏器,其余5例均为DDD起搏器。
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Methods Acute hemodynamic parameters were measured with Swan-Ganz catheter at varied AVD in DDD and VDD modes in 20 patients .
方法对20例置入DDD起搏器的患者经左侧锁骨下静脉插入Swan-Ganz导管,分别测量DDD方式及心房感知心室起搏(VDD)方式下的不同AVD起搏的急性血流动力学效应。
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On this basis , studies the whole chip ESD protecting structures , analyzes the ESD clamps between VDD and VSS / ground .
在此基础上,本文研究了全芯片抗静电结构,分析了VDD和VSS/地之间的箝位结构对整个芯片抗静电能力的影响。
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It indicated that a single lead VDD pacing system is a optimal treatment for pateint with high degree AVB and normal sinoatrial node function .
表明单电极导管VDD起搏系统具有植入简便和房室同步功能稳定的特点,是高度房室传导阻滞伴窦房结功能正常者的理想治疗方法。
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Significant differences were found in SCL-90 scores between the DDD / VDD and VVI groups , the former being better than the latter .
房室顺序起搏组SCL90得分与心室单腔起搏组比较差异有显著性,前者优于后者。
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A kind of Voice Diallers for Dummies ( VDD ) with its principles and realizations has been introduced in this paper .
本文将介绍一种傻瓜式声控电话机的基本原理和实现。
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Results Holter study showed that DDD and VDD pacing were VAT mode and the rate of atrioventricular synchronic pacing was over 95 % .
Holter检查显示:VDD和DDD起搏器的工作模式大多为VAT,房室同步起搏率达95%以上。
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The AD7693 is a16-bit , successive approximation analog-to-digital converter ( ADC ) that operates from a single power supply , VDD .
AD7693是一款16位、逐次逼近型模数转换器(ADC),采用单电源(VDD)供电。
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The application of a single lead VDD pacing system can achieve the goal of atrioventricular sequential pacing to treat the complete or high degree atrioventricular block patient whose sinus function is normal .
应用单根电极VDD起搏器治疗窦房结功能正常的完全性或高度房室传导阻带、可以达到房室顺序的起搏目的。
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In this model , VDD traps DOS VM ′ s I / O port access to drive Virtual Device and simulates a hardware interrupt to the DOS VM .
在该模型中,虚拟设备驱动程序捕获DOSVM的I/O端口访问去驱动虚拟设备,并为DOSVM产生虚拟硬件中断。
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In PSPICE simulating report , when supply voltage ( VDD ) is 0.5V , the output voltage of 6-stage charge pump can up to 2.68V .
PSPICE模拟结果,当电源电压为0.5V时,6级电压泵可使输出电压放大到2.68V。
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METHODS : 6 patients with OHCM who had underwent VDD pacemaker implantation were oberserved with the chang of left ventricular outflow track gradient and blood speed during follow up .
方法:对6例肥厚梗阻型心肌病患者植入VDD起搏器,并进行随访观察,观测其左室流出道压差及血流速度的变化情况。
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And ( 5 ) under the condition of hypoxia and perfusion with deprived glucose content for 15 min , the VDD and RPF were decreased ( P < 0 01 ) .
无糖低氧液灌流15min后,该慢电位VDD和RPF明显减慢(P<001)。
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The simulation results showed that the expected goals have been achieved . The three-stage system in standard single well process is capable of avoiding the inner high voltage impact and made the average gain per stage as high as 96 % or more of Vdd .
仿真结果表明,提出的设计目标已实现,采用普通工艺的系统能够避免系统内高压的影响,同时在多种输入电压情况下,系统均能使得每级的电压增益高达96%以上。
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Methods Eighteen patients with ⅲ or ⅱ degree atrioventricular block ( AVB ) were implanted with single lead DDD and VDD pace makers ( PM ) by subclavian venous puncture . After pacemaker implantation , Holter monitorings were studied in later 1 week , 3 ~ 6 month .
方法18例老年人采用锁骨下静脉穿刺法植入单导管DDD和VDD起搏器,并在植入后1周,3~6月分别做动态心电图(Holter)观察,随访时间6月~4年。