电源抑制比

然后，对LDO线性稳压器最主要的两个参数：稳定性和电源抑制比，进行小信号建模，给电路设计提供理论指导。

Next , on the main LDO linear regulators twoparameters : stability and PSRR . Provide theoretical guidance for circuit design .

一种高电源抑制比的基准电压源设计

A simple bandgap voltage reference with high PSRR

低功耗高电源抑制比CMOS带隙基准源设计

Design of CMOS Bandgap Voltage Reference with Low power and High PSRR

高电源抑制比的CMOS亚阈值多输出电压基准

Multiple-output CMOS weak inversion voltage reference of high PSRR

RF电路中LDO电源抑制比和噪声的选择

Selection for PSRR and Noise of LDO Used in RF Circuit

通过对低压低功耗集成电路设计技术的分析，着重设计了一个基于衬底驱动技术的CMOS带隙基准电压源，其带有提高电源抑制比电路和启动电路。

A CMOS bandgap voltage reference with low voltage based on the bulk driven technology is designed in this paper , with circuit to improve PSRR and start-up circuit .

在模/数转换器、数/模转换器、动态存储器、Flash存储器等集成电路设计中，低温度系数、低压低功耗、高电源抑制比的基准源设计是十分关键的。

Design of Reference resource of low temperature coefficient , low voltage , low power and high PSRR is completely pivotal in IC design of ADC , DAC , Dynamic Memory , Flash Memory and so on .

LDO具有较小的面积、功耗低、高电源抑制比，较好的线性瞬态响应以及效率较高的优点。

LDOs have advantages including : Smaller size 、 low power consumption 、 high powersupply rejection ratio 、 and better linear transient response .

提出一种输出低于1V的、无电阻高电源抑制比的CMOS带隙基准源（BGR）。

CMOS bandgap reference ( BGR ) without a resistor , with a high power supply rejection ratio and output below1V is proposed .

此电路采用工作于亚阈值区的峰值电流镜，构成自偏置电路，具有非常高的电源抑制比和温度稳定性，非常适合现代低电压低功耗的应用，而且非常适合当今的IC工艺。

It applies MOS peaking current mirror working in subthreshold region to construct a self-biasing circuit and has great rejection to power variation and has strong stability for temperature . This circuit is also suitable for today 's IC process .

此外电路又采用了内部负反馈回路，使基准电压源工作一个稳定的电压下，从而提高基准电压源的电源抑制比（PSRR）。

In additional , the use of inner negative feedback makes a steady-going voltage for the band gap reference and increase the PSRR .

放大器输出用作电路中PMOS电流源偏置，提高了电源抑制比（PSRR）。

The biasing of the PMOS current source is derived from the output voltage of the amplifier , leading to a high power supply rejection ( PSRR ) .

接着，针对高端消费类电子芯片和通信类电子芯片的性能要求，围绕基准参考源的温度系数和电源抑制比等性能指标，设计了四种低电压低功耗高性能的亚阈值MOSFET基准电路。

Then , four low power sub-threshold MOSFET voltage reference circuits meeting the development of the senior consuming electronic chips and the communication electronic chips have been designed . While they mainly emphasize on the temperature coefficient and PSRR performance .

用较简单的电路形式实现了低功耗和高电源抑制比的PTAT电流产生电路和CTAT电流产生电路。

We obtained PTAT and CTAT current generator with low power consumption and high PSRR , which in a simple circuit structure .

该设计提高了电源抑制比（PSRR），并具有较高的共模抑制比（CMRR）。

Simulation shows that the power supply rejection ratio ( PSRR ) of the circuit has been greatly improved , and high common mode rejection ration ( CMRR ) has been achieved for the cascode OTA .

并对传统带隙基准电路进行了改进，采用自偏置结构和共源共栅电流镜结构，用最简单的电路形式获得了低功耗、高线性度和高电源抑制比的PTAT电流产生电路。

The traditional bandgap reference circuit was improved in the design , which includes the applying of self-bias structure and cascode structure . By using the improvement method , we obtained low power consumption , high linear and high PSRR PTAT current generator , which in a simple circuit structure .

一种具有高电源抑制比的带隙基准电路

A Bandgap Reference With High Power Supply Rejection Ratio

该电路有较低的温度系数和较高的电源抑制比。

This circuit features low temperature coefficient and high power supply rejection ratio .

为了提高系统电源抑制比，降低谐波失真，本文设计了电压反馈环。

In order to improve the PSRR and THD , voltage feedback loop is applied .

电流源采用共源共栅结构，提高了电源抑制比。

The current source adopts cascade structure to improve power supply rejection ration ( PSRR ) .

通过增加一些辅助电路，提高了电路的电源抑制比。

By adding some auxiliary circuits , the power rejection ratio of the circuit is improved .

除了电源抑制比之外，输出电压的温度稳定性也是基准电压源一个重要的性能指标。

Besides the PSRR , the temperature stability of the output voltage is also an important performance index .

通过启动电路和提高电源抑制比电路的加入，使得带隙基准电压具有较高的电源电压抑制比和较小的温度系数。

The inclusion of the start up circuit and PSRR enhancement circuit enables it to achieve a low temperature coefficient and high PSRR .

而其全差分结构相对单端结构在几乎所有性能提升一倍的同时，还获得很好的共模抑制比和电源抑制比。

The full differential structure maintains good CMRR and PSRR while its GBW and slew rate doubles , compared to the single-output structure .

误差放大器的核心部分采用电流镜、折叠式共源共栅等结构，显著提高了增益、电源抑制比和共模抑制比；

By using the structures such as current mirror , folded-cascode and so on , The gain , PSRR and CMRR are improved remarkably ;

它们的温度稳定性电源抑制比以及抗噪性能等会影响整个电路的精度和性能。

Their temperature stability and the power supply rejection ratio , as well as noise and so on will affect the performance and accuracy of the entire circuit .

低温度系数、高电源抑制比是带隙基准电压源高性能的体现，也是本次带隙基准电压源设计的主要挑战。

The low TC ( Temperature-Coefficient ) and high PSRR ( Power-Supply-Rejection-Ratio ) are said as the high performance of the bandgap voltage reference , they are also the main challenges of the design .

本文讨论全平衡式OTA&C滤波器的性能特点，分析表明，这种滤波器的优点是提高电源抑制比，提高信噪比，克服非平衡结构的高频畸变等。

In this paper the performances of Fully Balanced OTA-C Filter are discussed . the analyses show that such OTA-C filter structure provides higher power supply rejection ratio , higher signal-to-noise ratio and better high frequency performance compared with single ended OTA-C filter structure .

带隙基准电压源的核心电路是Kujik结构，本文对它作了改进，通过叠加共源共栅结构的器件提高了电源电压抑制比。

The core circuit of the bandgap reference voltage source is Kujik structure , and it has been improved by adding cascade devices to improve power supply rejection ratio in this paper .

带隙基准可提供近似零温度系数和大的电源电压抑制比的稳定电压基准，且与工艺基本无关。

Bandgap Reference can provide stable voltage with nearly zero temperature coefficient and larger PSRR , and also are process unrelated .