Synopsys

Design tools of SYNOPSYS Co. are used .

所用的EDA工具全部是Synopsys公司的相关设计软件。

The expression is validated in Synopsys device simulation tools MEDICI .

表达式用MEDICI器件模拟软件进行了验证。

The simulated waveforms are given on the software Synopsys Saber .

并且给出了电路在SynopsysSaber软件上进行仿真的仿真波形，验证了该电路的合理性。

Synopsys supplied VMT ( Vera model technology ) can reduce the work amount of verification .

Synopsys公司VMT（Vera验证模型技术）工具可减小验证的工作量、节约时间。

It completes the two low-power design methodology design and implementation using Synopsys UPF of 65-nanometer low-power process .

利用Synopsys的65纳米的UPF低功耗流程完成这两个低功耗设计方法的设计与实现。

During the synthesis level , this thesis adopts the proper synthesis strategy and optimization measure to synthesize the IP core using Synopsys 's Design Compiler .

综合阶段，针对SDUM08的特点，采用合适的综合策略和优化手段，使用Synopsys公司综合工具Designcompiler对IP核进行了逻辑综合，并对综合结果进行了分析。

Reusing block level verification environment in top level is an efficient way to improve productivity . Synopsys ? NTB can conveniently achieve this reuse .

模块级验证环境在顶层验证中的复用可以有效地提高生产率，利用Synopsys先进的NTB验证语言可以方便地实现验证环境复用。

The codes are simulated by Synopsys VCS . The results validate its correctness . And the design supports the function of the Transaction Layer of PCI Express .

使用SynopsysVCS进行功能仿真，得出了仿真波形，验证了该设计的正确性，符合PCIExpress事务层协议。

The model of stator flux orientation senseless vector control was established with the software Saber of Synopsys company . Through the simulation , the design of systems was proved , showing good performance .

利用美国Synopsys公司的Saber软件建立定子磁场定向无速度矢量控制的仿真平台，仿真验证了系统设计的正确性。

Based on the above results , the author has established proper design and optimization flow and completed the physical design of a 32 bits RISC CPU by the VDSM CAD tools of Synopsys .

基于上述诸多项研究成果，确定了合理的技术路线及设计与优化流程。运用Synopsys超深亚微米级物理设计软件，实现了32位RISCCPU的物理级设计。

Moreover , based on comparative analysis of Synopsys Design Compiler to implement the hardware at the same constraint , an efficient half pixel interpolation filter ( 6-tap FIR ) architecture had been given finally .

并且在相同的约束条件下，使用Synopsys综合工具比较了各自的实现代价，最终给出了6阶1/2像素插值滤波器的优化实现结构。

Finally , this dissertation discusses how to embed full custom design into synthesis-based procedure and hardcore IP encapsulation . Index selection in Synopsys view look-up table of full custom design is carefully solved here .

最后，本文针对如何将全定制设计嵌入到基于综合的流程以及硬核的IP封装进行了探讨，重点解决了全定制设计的Synopsys视图查找表索引点选取问题。

Completing the RTL-level design , author uses the Synopsys VCS ( Verilog Compile Simulator ,) a dynamic simulation tool for design , and contrast the simulation results with the functional requirements to prove the correctness of the design .

RTL级设计完成后，作者采用了Synopsys公司的VCS（VerilogCompileSimulator）工具对设计进行了动态仿真，仿真结果与功能要求进行比对，证明了设计的正确性。

Iii. Physical level design . After a brief description of ASIC design flow adopted by PCI target secure chip , the thesis make great emphasis on various methods and skills used in physical design and verification with Apollo II from Synopsys .

ⅲ.物理级设计：在对PCI安全芯片所采用的的ASIC设计流程简单介绍后，文章重点论述了基于ApolloⅡ的物理设计和验证方法和技巧。

Method for view-generation and algorithm for interpolation are analyzed . And ways to determine proper index values of transition time and pin capacitance used in the lookup table of Synopsys model are also explained , along with the characterization types and its extraction theory .

详细分析了模块视图产生的方法、插值算法、Synopsys模型中查找表的跳变时间与负载电容索引点的合理取值、以及全定制模块特征值的类型及提取原理。

Then take TWB software package of Synopsys corporation as an example , he discusses how TCAD can be used in the IC new process development . A 700V BCD process design was also given as an example to justify the method that the author has proposed .

以synopsys公司的TWB虚拟FAB系统为例，对TCAD用于新工艺的开发作了探讨，并给出了以此为平台进行700V高压BCD工艺设计的实例。

Design methods for multipliers in an 8-bit RISC single-chip microcomputer are described . The operational principle of some multipliers , such as shifter-adder-multiplier , adder-tree-multiplier and Booth-encode-shifter-adder-multiplier , are analyzed , which are implemented using Synopsys 's design tools .

介绍了一种8位RISC结构单片机中乘法器的设计方法，分析了移位相加、加法器树、Booth编码-移位相加等多种乘法器的工作原理，并采用Synopsys综合工具实现了这些乘法器。