千兆以太网

在系统硬件逻辑开发上采用了模块化思想，将整个系统分为千兆以太网接入、数据匹配过滤和PCIExpress总线的DMA传输三部分来设计并实现。

The thoughts of modular is used in system hardware logical design , the entire system is divided into three parts : Access of Gigabit Ethernet ,, Filtering and matching data and DMA transmission of PCI Express bus .

基于千兆以太网的LED显示屏控制系统冗余技术的研究

Research on Redundancy Technology in LED Display Control System Based on Gigabit Ethernet

基于FPGA的千兆以太网光纤转换器的设计

Design of optical fiber converter of Gigabit Ethernet based on FPGA

基于fpga的十端口千兆以太网接口的设计与实现

Design and Implementation of Ten ports giga Ethernet interface Based FPGA

下面是ExtremeNetworksSummit400-48t48口千兆以太网交换机的配置步骤。

Here are the configuration steps for an Extreme Networks Summit 400-48t 48-port Gigabit Ethernet switch .

基于FPGA的千兆以太网分布式数据传输技术

Gigabit Ethernet Distributed Data Transmission Technology Based on FPGA

基于千兆以太网中支持QoS的几种协议

Several agreement of supporting QoS in Gigabit Ethernet

0.25μMCMOS千兆以太网发送器设计

Design of a Gigabit Ethernet Transmitter using 0.25 μ m CMOS Technology

基于0.18μMCMOS工艺的千兆以太网数据判决电路芯片

18 μ m CMOS Data Decision IC for Gigabit Ethernet

千兆以太网加ATM网技术在校园网设计方案中的应用

The Application of Gigabit Ethernet and ATM Among Campus Network Design Project

校园主干网中的ATM与千兆以太网之争

ATM and Gigabit Ethernet in Backbone of Campus Network

现在可以在千兆以太网适配器上使用target软件驱动程序，这可以提高该类环境中的性能。

The target software driver can now be used over a gigabyte Ethernet adapter , which should clearly improve performance in this type of environment .

千兆以太网中的8B/10B编解码的CPLD实现技术

CPLD Implementation of 8B / 10B Encoder / Decoder for Gigabit Ethernet

介绍了多DSP系统硬件结构框架，并重点介绍了系统的PCI模块和千兆以太网模块。

And then the multi-DSP architecture is introduced , especially the PCI module and EMAC module .

在FPGA最小电路系统的基础上，设计了千兆以太网硬件接口电路。

Based on minimum circuit system of FPGA , the hardware circuit of Gigabit Ethernet interface is designed .

设计并实现了用于光纤用户网和千兆以太网光接收机的CMOS前置放大器。

A CMOS preamplifier for optical access network systems and gigabit Ethernet systems is realized .

ATM和千兆以太网的比较

Comparison of ATM and Gigabit Ethernet

千兆以太网与超高速VLSI技术

Gigabit - Ethernet and Ultrahigh Speed VLSI

而以太网由于能很好的适应IP网络，并且随着百兆、千兆以太网标准的推出，光以太网正迅速成长为众多接入网技术中的一支重要力量。

With the appearance of Fast Ethernet and its good adaptability to IP network , optical Ethernet becomes one important method among numerous access network technologies .

VLAN技术及其在千兆以太网中的应用

VLAN Techniques Application in kM Ethernet

千兆以太网SOPC系统的实现

Design of Gigabit Ethernet Network SOPC

基于SOPC的千兆以太网接入设计

Gigabit Ethernet Design Based on SOPC

文章介绍了一种基于FPGA的8端口千兆以太网交换芯片的实现方案，并且给出了仿真验证结果。结果表明，该设计方案是可行的。

In this paper , a method that implements 8 ports Gigabit Ethernet switch chip on FPGA is introduced , and the simulation and verification results are given .

集成双口千兆以太网，支持网络唤醒、网络卸载引擎（TOE）等网络高级特性。

Integrated dual-port Gigabit Ethernet , Wake on LAN , the network offload engine ( TOE ) and other network advanced features .

文中提出了用可重配置硬件（FPGA）和商用千兆以太网MAC实现的网络入侵检测系统体系结构。

In this Paper , a novel architecture for IDS based on a reconfigurable hardware , a FPGA , coupled with a commodity Gigabit Ethernet MAC is proposed .

正如本文前面所讨论的，DB2pureScaleFeature为RDMAoverEthernet利用一个10千兆以太网，支持成员与CF之间的最优通信。

As discussed previously in this article , the DB2 pureScale Feature leverages a10 gigabit Ethernet network for RDMA over Ethernet to allow optimal communication between members and CF.

本文介绍了宽带IP城域网建设的网络总体框架和结构层次，重点分析和比较了利用ATM、POS、千兆以太网组建城域网的三种组网技术；

This paper introduces the network framework and hierarchy of broadband IP MAN , and emphatically analyzes and compares three networking technologies by using ATM , POS and Gigabit Ethernet respectively .

SFP光模块和4通道SerDes千兆以太网解决方案

GigaBit Ethernet Physical Layer Solution Utilizing SFP Optical Transceivers and Quad-Channel SerDes

制定了一套完备的嵌入式高速图像传输系统解决方案，依赖FPGA进行逻辑开发以及现有的千兆以太网技术，实现图像数据的高速传输。

We have developed a complete embedded high-speed image transmission system solution , which rely on FPGA in logic development as well as the existing gigabit Ethernet technology , to realize the image data high-speed transmission .

本文中所提出的VCO（压控振荡器）是千兆以太网控制器中PLL（锁相环）的一个部分。

The proposed VCO ( voltage controlled oscillator ) in this paper is a part of PLL ( phase locked loop ) in the network controller .