memory cell

Its memory cell survival time is longer .

其记忆细胞存活的时间则更长。

Numerical Analysis of Single Electron Transistor / Field Effect Transistor Hybrid Memory Cell

单电子晶体管/场效应管混合存储单元数值分析

Novel Design of Switched-Current Memory Cell with High Performance

一种新型高性能开关电流存储单元的设计

The memory cell keeps better antibodies of the antibody population .

记忆单元保存抗体群中亲和力较高的抗体。

Analysis and Design of Memory Cell of Asynchronous FIFO

异步FIFO中存储单元的分析设计

Flash Memory Cell Uses " Mirrors " to Double Its Capacity

利用镜像技术使闪存单元容量加倍

Studies of Decoherence in the Memory Cell of Quantum Computer

量子计算机存储单元相干脱散的研究

Then the memory cell 's size is designed by SNM simulation .

之后，通过仿真存储单元的噪声容限设计了SRAM六管存储单元的尺寸。

System hardware design includes : control unit design , the synchronization signal unit design , memory cell design and power design .

系统硬件设计包括：控制单元的设计、同步信号发生单元的设计、存储单元的设计和电源设计。

Spontaneous emission and decoherence in quantum computer memory cell

自发发射与量子计算机存储单元的相干脱散

A single poly non-volatile memory cell structure implemented in a standard CMOS process is developed .

这里提出了一个基于标准CMOS工艺的单层多晶硅的非易失性存储器。

Single aluminum memory cell

单层铝金属化式存储单元

Theory and Erase / Write Characteristics of FLOTOX EEPROM Memory Cell

FLOTOX型EEPROM存贮管的擦写特性与理论分析

Decoherence Properties of Quantum Memory Cell in Squeezed Vaccum Reservoir

压缩真空场中量子存储单元的消相干特性

The embedded SRAM performance model , structure optimization and memory cell device dimension optimization are studied in this article .

本文针对嵌入式SRAM性能模型、结构优化和存储单元尺寸优化进行了深入研究。

In between , author suggests a new method of plug-in intermediate memory cell & displacement signal condition interval method .

其中提出了一种插入中间记忆元件的新法&行程信号状态区间法。

Whether different levels of memory cell will affect the outcome of disseminated tumor cells is still under investigation .

骨髓播散肿瘤细胞转变成为大体转移的患者，是否与其记忆T细胞水平低下相关需作进一步研究。

Research the Rose Bengal memory cell which is based on the Al / ITO electrodes .

研究了基于铝/氧化铟锡电极的虎红分子存储单元产生双稳态现象的原因。

To improve its reliability , each memory cell is designed to have double floating gates to store information data .

为了提高数据存储的可靠性，存储单元采用了双浮栅存储节点结构。

An Cascode S ~ 2I Memory Cell and Its Performance

共源-共栅组态S~2I电流存储单元及其性能

Impact of Threshold Voltage on VDSM SRAM Memory Cell SNM

阈值电压对超深亚微米SRAM存储单元SNM的影响

In the first one , a new memory cell which is comprised of SRAM cell and EEPROM cell is designed .

第一种设计是采用SRAM和EEPROM存储单元组成新的存储单元，然后进行阵列设计；

Immune model includes three major modules : memory cell generation module , detection module mature cells , immature cells , tolerance module .

免疫模型包括记忆细胞生成、免疫检测等4个模块。

Based on the physical mechanism of data remanence , a novel memory cell is proposed which can effectively inhibit data remanence .

本文分析了六管SRAM数据残留的物理机理，并基于此设计了一个可有效抑制数据残留的存储单元。

Conceptual Design with a Molecular Dynamics Simulation of the Performance Characteristics of a Nonvolatile Molecular Memory Cell Operating in a Room-Temperature Environment

室温下工作的非易失性分子级存储单元的操作设计与分子动力学模拟

It utilizes the same memory cell with SRAM core cells and to get the corresponding supply voltage through data flipping features .

它采用与SRAM存储单元相同的模拟单元，通过模拟其数据翻转特性得到对应的电源电压。

What sequence of events do you think would be required to move the contents of one memory cell in a computer to another memory cell ?

你认为要搬移某记忆体单元的内容至另一记忆体单元需要哪些一连串的事件来完成？

Concentrator design includes the main controller , power supply circuit , memory cell , the clock module , GPRS module and interface circuit .

集中器的设计包括主控制器、电源电路、存储单元、时钟单元、GPRS模块和接口电路构成。

A divided memory cell array architecture and high speed hierarchical sense amplifiers are employed in the design to optimize the structure of the circuit .

通过采用存储阵列的分块、敏感放大器的分级等技术，对电路的结构进行了优化。

A 1-mil ~ 2 Single-Transistor Memory Cell in n Silicon-Gate Technology

采用n型硅栅工艺的1密耳~2单管存储单元