coprocessor

Research and Implementation of the Data Parallel Coprocessor Memory System

数据并行协处理器存储系统的研究与实现

FPGA is as coprocessor which is mainly used to control pulse .

FPGA作为协处理器，主要用于控制脉冲。

Design of AES Coprocessor Used on the Node of Wireless Sensor Network

无线传感器网络节点中AES协处理器的设计

A Run Time Reconfigurable Coprocessor Research in Data Processing System of Space Solar Telescope

空间太阳望远镜星载数据处理系统中的动态可重构协处理器研究

Modularization Scheme for Solving Solution Space Detection Problem of DNA Computer with Coprocessor

协同DNA计算机解空间问题的模块化设计方案

Study on High-speed Network IDS Based on NP & Coprocessor

基于网络处理器及协处理器的高速网IDS的研究

Design and Implement of Data Cache for Digital Signal Coprocessor Based on TTA

TTA结构数字信号协处理器数据Cache的设计与实现

The function of the security coprocessor is hardware acceleration .

安全协处理器实际上起到的就是硬件加速的作用。

Design and Implementation of the Coprocessor in Network Processors

网络处理器中协处理器设计方法研究及实现

AES Coprocessor Implementation Based on Wireless Sensor Network

基于无线传感网络的AES协处理器设计

Design and Measure Coprocessor based on CORDIC Algorithm

基于CORDIC算法的数字协处理器设计与测试

Design of an RSA Coprocessor for Smart Card Application

一种适用于智能卡应用的RSA协处理器

Application and Realization of Multimedia Coprocessor for Mobile

手机多媒体协处理器芯片的应用与实现

The Unified Fast Implementation of Elementary Functions in the Embeded Coprocessor

嵌入式协处理器初等函数的快速统一实现

Montgomery Algorithm Based RSA Cryptography Coprocessor for Smart Card Application

基于Montgomery算法的智能卡RSA密码协处理器

Research on Acceleration Mechanisms of Custom Instruction and Coprocessor

定制指令与协处理器加速机制的研究

Design of system control coprocessor in 32-bit RISC processor

32位RISC处理器中系统控制协处理器的设计与实现

Design and Implementation of AES Crypto Coprocessor Based on FPGA

基于FPGA的AES密码协处理器的设计和实现

The multimedia coprocessor consists of several modules to accelerate the processing of multimedia data .

多媒体协处理器中包含了多个专用于多媒体处理的功能模块，可以加速多媒体处理的进行。

The FPGA was used as a coprocessor for image acquisition and pre-processing .

FPGA作为协处理器完成图像的采集和预处理。

The paper puts emphasis on research and design of coprocessor algorithm , data path , control path and modules .

本文的重点是协处理器算法、数据通道、控制通道及其模块的设计与研究。

Architecture research and design of parallel and reconfigurable ECC coprocessor based on VLIW architecture

基于VLIW的并行可配置ECC协处理器结构研究与设计

The combinative implementation of division and square root in an embedded coprocessor

嵌入式协处理器中除法和平方根计算的整合设计

The second one is to research and analyze most hardware resource of the coprocessor and discuss their working principle .

第二部分主要针对协处理器所要完成的任务，研究协处理器所需要的硬件资源，并对各个硬件资源模块的工作原理进行了研究、分析和设计。

The designed block has been embedded in the coprocessor , and the product test is successful .

采用该方法设计的微程序控制器已经嵌入协处理器中，并且流片测试成功。

Design of a motion estimation coprocessor

运动估计协处理器的设计

Concept and Design Principle of Reconfigurable Cipher Coprocessor

可重构密码协处理器的概念及其设计原理

The Research of General Parallel Vector Crypto Coprocessor

通用并行向量密码处理器研究

Finally , circuit design , physical design , simulation and validation of the encryption coprocessor chip are presented .

然后，讨论了加密协处理器芯片的电路设计和仿真、验证问题。

The design and implementation of RSA coprocessor .

RSA协处理器的设计与实现。