Video Memory

Transfer speed of data from the host to the video memory .

从主机到视频内存间的数据传输速度。

This article introduces that in radar raster display system , using SDRAM as video memory and adopting FPGA to carry out the process of control circuit .

本文介绍了在雷达光栅显示系统中，应用SDRAM作为视频存储器时，采用FPGA实现控制电路的过。

A Unified Model Formation for Video Memory and Index

图像存储与检索统一性模型构造

If possible reduce the size of shared Video Memory ( BIOS ) or add more memory to your system then try again .

尝试减少共享显存（BIOS）的大小或者在系统中添加更多的内存，然后再次尝试。

Now we 'll do whatever it takes to write some pixels to that fresh new slate of blank video memory .

现在我们已经完成了将像素写入空白显存所需要执行的操作了。

However , GPU may compress these normal map textures to save the valuable video memory and limited bandwidth just as the common texture compression technology does .

对于移动设备而言，必须对法线纹理图进行压缩以节省宝贵显存空间和带宽资源。本文利用法线纹理图的特性，提出一种混合自适应纹理压缩算法。

With the evolution of civil and military simulation and C & C system , in many cases we need to real-timely render terrains with huge texture which is too large to fit into video memory .

随着民用和军用的仿真系统和C&C系统的发展，在很多情况下，实时渲染的地形都需要使用巨量图像数据作为纹理。

This stage makes heavy use of the video memory and the video memory bus . Due to the complex in the hydrolyze process , the inorganic flocculant does a obvious influence on the result of Coagu-flocculation in industry .

这个过程中对显存和显存总线的负担比较大。无机混凝剂由于其水解过程的复杂性，在工业使用中对混凝的效果有较明显的影响。

The numerical experiment results show that the speed is increased by more than 10 ~ 2 times . In addition , we optimize the storage of texture in the algorithm , which saves video memory bandwidth , and is more suitable for reconstruction of multi-scan mode .

同时算法中优化了纹理存储方式，节约了显存带宽，更适合多次偏置扫描模式的重建，算法运行速度比CPU上的运行速度快了两个数量级。

Digital Video Multi-window Memory Address Generator Design Based on FPGA

基于FPGA的数字视频多窗口内存地址生成器设计

Design of SDRAM-based Video Data Memory System

基于SDRAM的视频数据存储系统设计

In the field of signal processing , high efficiency network , and high definition audio / video , memory bandwidth has increasingly become a bottleneck , especially in multi-core SoC designs .

在信号处理、高性能网络设备和高清音视频等领域，尤其对于多核SoC设计，存储器带宽越来越成为限制系统性能的瓶颈。

This article introduces that in a new design of radar raster-displaying terminal , SDRAM is used as video frame memory and FPGA is adopted to carry out the process of control circuit .

SDRAM作为雷达光栅显示视频帧缓冲存储器，通过FPGA器件实现对SDRAM的控制，已成功应用于一款雷达光栅显示终端。

Normally , framebuffer devices give you direct access to the video card 's memory .

通常，framebuffer设备都会让您直接访问显卡内存。

As nucleus equipment of digital monitoring center , DVR is an integral system which combines audio and video codec , memory and network .

DVR作为数字监控中心的核心设备，是集音视频编解码、存储和网络于一体的一套完整的系统。

For the hardware , the design of the video decoder , memory , FPGA and USB controller interface is done after choosing the configure devices of the hardware system .

在硬件设计部分：对硬件系统的配置器件进行了选型、分析，在此基础上，完成了视频解码接口、存储器接口、FPGA控制器接口和USB控制接口电路的设计。

A video interaction installation embodies memory .

具有记忆力的影像互动装置。

The paper was based on high-speed video ′ s file memory structure and then introduced a method about how to use VC + + ′ s operating functions on disk files to make different real-time information came from high-speed video and track flat roof into one file .

基于高速电视文件存储结构，利用VC++对磁盘文件的操作功能，将来自高速电视和跟踪转台的不同形式运动信息合成；

Video graphics device not found or video memory bad

找不到显示卡或者视频存储器损坏

In this paper , an address mapping method for multi-standard video is presented , which maps video picture into the memory space of DDR SDRAM with a simple formula .

提出了一种支持多标准视频的存储器地址映射方法，用一个简洁的公式把视频图像映射到DDRSDRAM的存储空间。

With the stepwise increase of people security protection consciousness , The DVR product of video monitoring is more and more widely applied in all walks of life , corresponding the DVR major design of video coding and memory technology are also becoming hot spots .

随着人们安防意识的逐步提高，视频监控的DVR产品越来越被广泛的应用在生活中的各个领域，相应的DVR的关键设计&视频编码和存储技术也是人们关注的热点。